1# 2# I2C subsystem configuration 3# 4 5menu "I2C support" 6 7config DM_I2C 8 bool "Enable Driver Model for I2C drivers" 9 depends on DM 10 help 11 Enable driver model for I2C. The I2C uclass interface: probe, read, 12 write and speed, is implemented with the bus drivers operations, 13 which provide methods for bus setting and data transfer. Each chip 14 device (bus child) info is kept as parent plat. The interface 15 is defined in include/i2c.h. 16 17config SPL_DM_I2C 18 bool "Enable Driver Model for I2C drivers in SPL" 19 depends on SPL_DM && DM_I2C 20 default y 21 help 22 Enable driver model for I2C. The I2C uclass interface: probe, read, 23 write and speed, is implemented with the bus drivers operations, 24 which provide methods for bus setting and data transfer. Each chip 25 device (bus child) info is kept as parent platdata. The interface 26 is defined in include/i2c.h. 27 28config I2C_CROS_EC_TUNNEL 29 tristate "Chrome OS EC tunnel I2C bus" 30 depends on CROS_EC 31 help 32 This provides an I2C bus that will tunnel i2c commands through to 33 the other side of the Chrome OS EC to the I2C bus connected there. 34 This will work whatever the interface used to talk to the EC (SPI, 35 I2C or LPC). Some Chromebooks use this when the hardware design 36 does not allow direct access to the main PMIC from the AP. 37 38config I2C_CROS_EC_LDO 39 bool "Provide access to LDOs on the Chrome OS EC" 40 depends on CROS_EC 41 ---help--- 42 On many Chromebooks the main PMIC is inaccessible to the AP. This is 43 often dealt with by using an I2C pass-through interface provided by 44 the EC. On some unfortunate models (e.g. Spring) the pass-through 45 is not available, and an LDO message is available instead. This 46 option enables a driver which provides very basic access to those 47 regulators, via the EC. We implement this as an I2C bus which 48 emulates just the TPS65090 messages we know about. This is done to 49 avoid duplicating the logic in the TPS65090 regulator driver for 50 enabling/disabling an LDO. 51 52config I2C_SET_DEFAULT_BUS_NUM 53 bool "Set default I2C bus number" 54 depends on DM_I2C 55 help 56 Set default number of I2C bus to be accessed. This option provides 57 behaviour similar to old (i.e. pre DM) I2C bus driver. 58 59config I2C_DEFAULT_BUS_NUMBER 60 hex "I2C default bus number" 61 depends on I2C_SET_DEFAULT_BUS_NUM 62 default 0x0 63 help 64 Number of default I2C bus to use 65 66config DM_I2C_GPIO 67 bool "Enable Driver Model for software emulated I2C bus driver" 68 depends on DM_I2C && DM_GPIO 69 help 70 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO 71 configuration is given by the device tree. Kernel-style device tree 72 bindings are supported. 73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt 74 75config SPL_DM_I2C_GPIO 76 bool "Enable Driver Model for software emulated I2C bus driver in SPL" 77 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO_SUPPORT 78 default y 79 help 80 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO 81 configuration is given by the device tree. Kernel-style device tree 82 bindings are supported. 83 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt 84 85config SYS_I2C_AT91 86 bool "Atmel I2C driver" 87 depends on DM_I2C && ARCH_AT91 88 help 89 Add support for the Atmel I2C driver. A serious problem is that there 90 is no documented way to issue repeated START conditions for more than 91 two messages, as needed to support combined I2C messages. Use the 92 i2c-gpio driver unless your system can cope with this limitation. 93 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt 94 95config SYS_I2C_IPROC 96 bool "Broadcom I2C driver" 97 depends on DM_I2C 98 help 99 Broadcom I2C driver. 100 Add support for Broadcom I2C driver. 101 Say yes here to to enable the Broadco I2C driver. 102 103config SYS_I2C_FSL 104 bool "Freescale I2C bus driver" 105 depends on DM_I2C 106 help 107 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and 108 MPC85xx processors. 109 110config SYS_I2C_CADENCE 111 tristate "Cadence I2C Controller" 112 depends on DM_I2C 113 help 114 Say yes here to select Cadence I2C Host Controller. This controller is 115 e.g. used by Xilinx Zynq. 116 117config SYS_I2C_CA 118 tristate "Cortina-Access I2C Controller" 119 depends on DM_I2C && CORTINA_PLATFORM 120 default n 121 help 122 Add support for the Cortina Access I2C host controller. 123 Say yes here to select Cortina-Access I2C Host Controller. 124 125config SYS_I2C_DAVINCI 126 bool "Davinci I2C Controller" 127 depends on (ARCH_KEYSTONE || ARCH_DAVINCI) 128 help 129 Say yes here to add support for Davinci and Keystone I2C controller 130 131config SYS_I2C_DW 132 bool "Designware I2C Controller" 133 default n 134 help 135 Say yes here to select the Designware I2C Host Controller. This 136 controller is used in various SoCs, e.g. the ST SPEAr, Altera 137 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs. 138 139config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED 140 bool "DW I2C Enable Status Register not supported" 141 depends on SYS_I2C_DW && (TARGET_SPEAR300 || TARGET_SPEAR310 || \ 142 TARGET_SPEAR320 || TARGET_SPEAR600 || TARGET_X600) 143 default y 144 help 145 Some versions of the Designware I2C controller do not support the 146 enable status register. This config option can be enabled in such 147 cases. 148 149config SYS_I2C_ASPEED 150 bool "Aspeed I2C Controller" 151 depends on DM_I2C && ARCH_ASPEED 152 help 153 Say yes here to select Aspeed I2C Host Controller. The driver 154 supports AST2500 and AST2400 controllers, but is very limited. 155 Only single master mode is supported and only byte-by-byte 156 synchronous reads and writes are supported, no Pool Buffers or DMA. 157 158config SYS_I2C_INTEL 159 bool "Intel I2C/SMBUS driver" 160 depends on DM_I2C 161 help 162 Add support for the Intel SMBUS driver. So far this driver is just 163 a stub which perhaps some basic init. There is no implementation of 164 the I2C API meaning that any I2C operations will immediately fail 165 for now. 166 167config SYS_I2C_IMX_LPI2C 168 bool "NXP i.MX LPI2C driver" 169 help 170 Add support for the NXP i.MX LPI2C driver. 171 172config SYS_I2C_MESON 173 bool "Amlogic Meson I2C driver" 174 depends on DM_I2C && ARCH_MESON 175 help 176 Add support for the I2C controller available in Amlogic Meson 177 SoCs. The controller supports programmable bus speed including 178 standard (100kbits/s) and fast (400kbit/s) speed and allows the 179 software to define a flexible format of the bit streams. It has an 180 internal buffer holding up to 8 bytes for transfers and supports 181 both 7-bit and 10-bit addresses. 182 183config SYS_I2C_MXC 184 bool "NXP MXC I2C driver" 185 help 186 Add support for the NXP I2C driver. This supports up to four bus 187 channels and operating on standard mode up to 100 kbits/s and fast 188 mode up to 400 kbits/s. 189 190# These settings are not used with DM_I2C, however SPL doesn't use 191# DM_I2C even if DM_I2C is enabled, and so might use these settings even 192# when main u-boot does not! 193if SYS_I2C_MXC && (!DM_I2C || SPL) 194config SYS_I2C_MXC_I2C1 195 bool "NXP MXC I2C1" 196 help 197 Add support for NXP MXC I2C Controller 1. 198 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A 199 200config SYS_I2C_MXC_I2C2 201 bool "NXP MXC I2C2" 202 help 203 Add support for NXP MXC I2C Controller 2. 204 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A 205 206config SYS_I2C_MXC_I2C3 207 bool "NXP MXC I2C3" 208 help 209 Add support for NXP MXC I2C Controller 3. 210 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A 211 212config SYS_I2C_MXC_I2C4 213 bool "NXP MXC I2C4" 214 help 215 Add support for NXP MXC I2C Controller 4. 216 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A 217 218config SYS_I2C_MXC_I2C5 219 bool "NXP MXC I2C5" 220 help 221 Add support for NXP MXC I2C Controller 5. 222 Required for SoCs which have I2C MXC controller 5 eg LX2160A 223 224config SYS_I2C_MXC_I2C6 225 bool "NXP MXC I2C6" 226 help 227 Add support for NXP MXC I2C Controller 6. 228 Required for SoCs which have I2C MXC controller 6 eg LX2160A 229 230config SYS_I2C_MXC_I2C7 231 bool "NXP MXC I2C7" 232 help 233 Add support for NXP MXC I2C Controller 7. 234 Required for SoCs which have I2C MXC controller 7 eg LX2160A 235 236config SYS_I2C_MXC_I2C8 237 bool "NXP MXC I2C8" 238 help 239 Add support for NXP MXC I2C Controller 8. 240 Required for SoCs which have I2C MXC controller 8 eg LX2160A 241endif 242 243if SYS_I2C_MXC_I2C1 244config SYS_MXC_I2C1_SPEED 245 int "I2C Channel 1 speed" 246 default 40000000 if TARGET_LS2080A_EMU 247 default 100000 248 help 249 MXC I2C Channel 1 speed 250 251config SYS_MXC_I2C1_SLAVE 252 int "I2C1 Slave" 253 default 0 254 help 255 MXC I2C1 Slave 256endif 257 258if SYS_I2C_MXC_I2C2 259config SYS_MXC_I2C2_SPEED 260 int "I2C Channel 2 speed" 261 default 40000000 if TARGET_LS2080A_EMU 262 default 100000 263 help 264 MXC I2C Channel 2 speed 265 266config SYS_MXC_I2C2_SLAVE 267 int "I2C2 Slave" 268 default 0 269 help 270 MXC I2C2 Slave 271endif 272 273if SYS_I2C_MXC_I2C3 274config SYS_MXC_I2C3_SPEED 275 int "I2C Channel 3 speed" 276 default 100000 277 help 278 MXC I2C Channel 3 speed 279 280config SYS_MXC_I2C3_SLAVE 281 int "I2C3 Slave" 282 default 0 283 help 284 MXC I2C3 Slave 285endif 286 287if SYS_I2C_MXC_I2C4 288config SYS_MXC_I2C4_SPEED 289 int "I2C Channel 4 speed" 290 default 100000 291 help 292 MXC I2C Channel 4 speed 293 294config SYS_MXC_I2C4_SLAVE 295 int "I2C4 Slave" 296 default 0 297 help 298 MXC I2C4 Slave 299endif 300 301if SYS_I2C_MXC_I2C5 302config SYS_MXC_I2C5_SPEED 303 int "I2C Channel 5 speed" 304 default 100000 305 help 306 MXC I2C Channel 5 speed 307 308config SYS_MXC_I2C5_SLAVE 309 int "I2C5 Slave" 310 default 0 311 help 312 MXC I2C5 Slave 313endif 314 315if SYS_I2C_MXC_I2C6 316config SYS_MXC_I2C6_SPEED 317 int "I2C Channel 6 speed" 318 default 100000 319 help 320 MXC I2C Channel 6 speed 321 322config SYS_MXC_I2C6_SLAVE 323 int "I2C6 Slave" 324 default 0 325 help 326 MXC I2C6 Slave 327endif 328 329if SYS_I2C_MXC_I2C7 330config SYS_MXC_I2C7_SPEED 331 int "I2C Channel 7 speed" 332 default 100000 333 help 334 MXC I2C Channel 7 speed 335 336config SYS_MXC_I2C7_SLAVE 337 int "I2C7 Slave" 338 default 0 339 help 340 MXC I2C7 Slave 341endif 342 343if SYS_I2C_MXC_I2C8 344config SYS_MXC_I2C8_SPEED 345 int "I2C Channel 8 speed" 346 default 100000 347 help 348 MXC I2C Channel 8 speed 349 350config SYS_MXC_I2C8_SLAVE 351 int "I2C8 Slave" 352 default 0 353 help 354 MXC I2C8 Slave 355endif 356 357config SYS_I2C_NEXELL 358 bool "Nexell I2C driver" 359 depends on DM_I2C 360 help 361 Add support for the Nexell I2C driver. This is used with various 362 Nexell parts such as S5Pxx18 series SoCs. All chips 363 have several I2C ports and all are provided, controlled by the 364 device tree. 365 366config SYS_I2C_OCORES 367 bool "ocores I2C driver" 368 depends on DM_I2C 369 help 370 Add support for ocores I2C controller. For details see 371 https://opencores.org/projects/i2c 372 373config SYS_I2C_OMAP24XX 374 bool "TI OMAP2+ I2C driver" 375 depends on ARCH_OMAP2PLUS || ARCH_K3 376 help 377 Add support for the OMAP2+ I2C driver. 378 379if SYS_I2C_OMAP24XX 380config SYS_OMAP24_I2C_SLAVE 381 int "I2C Slave addr channel 0" 382 default 1 383 help 384 OMAP24xx I2C Slave address channel 0 385 386config SYS_OMAP24_I2C_SPEED 387 int "I2C Slave channel 0 speed" 388 default 100000 389 help 390 OMAP24xx Slave speed channel 0 391endif 392 393config SYS_I2C_RCAR_I2C 394 bool "Renesas RCar I2C driver" 395 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C 396 help 397 Support for Renesas RCar I2C controller. 398 399config SYS_I2C_RCAR_IIC 400 bool "Renesas RCar Gen3 IIC driver" 401 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C 402 help 403 Support for Renesas RCar Gen3 IIC controller. 404 405config SYS_I2C_ROCKCHIP 406 bool "Rockchip I2C driver" 407 depends on DM_I2C 408 help 409 Add support for the Rockchip I2C driver. This is used with various 410 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips 411 have several I2C ports and all are provided, controlled by the 412 device tree. 413 414config SYS_I2C_SANDBOX 415 bool "Sandbox I2C driver" 416 depends on SANDBOX && DM_I2C 417 help 418 Enable I2C support for sandbox. This is an emulation of a real I2C 419 bus. Devices can be attached to the bus using the device tree 420 which specifies the driver to use. See sandbox.dts as an example. 421 422config SYS_I2C_OCTEON 423 bool "Octeon II/III/TX/TX2 I2C driver" 424 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C 425 default y 426 help 427 Add support for the Marvell Octeon I2C driver. This is used with 428 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All 429 chips have several I2C ports and all are provided, controlled by 430 the device tree. 431 432config SYS_I2C_S3C24X0 433 bool "Samsung I2C driver" 434 depends on ARCH_EXYNOS4 && DM_I2C 435 help 436 Support for Samsung I2C controller as Samsung SoCs. 437 438config SYS_I2C_STM32F7 439 bool "STMicroelectronics STM32F7 I2C support" 440 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C 441 help 442 Enable this option to add support for STM32 I2C controller 443 introduced with STM32F7/H7 SoCs. This I2C controller supports : 444 _ Slave and master modes 445 _ Multimaster capability 446 _ Standard-mode (up to 100 kHz) 447 _ Fast-mode (up to 400 kHz) 448 _ Fast-mode Plus (up to 1 MHz) 449 _ 7-bit and 10-bit addressing mode 450 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask) 451 _ All 7-bit addresses acknowledge mode 452 _ General call 453 _ Programmable setup and hold times 454 _ Easy to use event management 455 _ Optional clock stretching 456 _ Software reset 457 458config SYS_I2C_TEGRA 459 bool "NVIDIA Tegra internal I2C controller" 460 depends on ARCH_TEGRA 461 help 462 Support for NVIDIA I2C controller available in Tegra SoCs. 463 464config SYS_I2C_UNIPHIER 465 bool "UniPhier I2C driver" 466 depends on ARCH_UNIPHIER && DM_I2C 467 default y 468 help 469 Support for UniPhier I2C controller driver. This I2C controller 470 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs. 471 472config SYS_I2C_UNIPHIER_F 473 bool "UniPhier FIFO-builtin I2C driver" 474 depends on ARCH_UNIPHIER && DM_I2C 475 default y 476 help 477 Support for UniPhier FIFO-builtin I2C controller driver. 478 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. 479 480config SYS_I2C_VERSATILE 481 bool "Arm Ltd Versatile I2C bus driver" 482 depends on DM_I2C && (TARGET_VEXPRESS_CA15_TC2 || TARGET_VEXPRESS64_JUNO) 483 help 484 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host 485 controller is present in the development boards manufactured by Arm Ltd. 486 487config SYS_I2C_MVTWSI 488 bool "Marvell I2C driver" 489 depends on DM_I2C 490 help 491 Support for Marvell I2C controllers as used on the orion5x and 492 kirkwood SoC families. 493 494config TEGRA186_BPMP_I2C 495 bool "Enable Tegra186 BPMP-based I2C driver" 496 depends on TEGRA186_BPMP 497 help 498 Support for Tegra I2C controllers managed by the BPMP (Boot and 499 Power Management Processor). On Tegra186, some I2C controllers are 500 directly controlled by the main CPU, whereas others are controlled 501 by the BPMP, and can only be accessed by the main CPU via IPC 502 requests to the BPMP. This driver covers the latter case. 503 504config SYS_I2C_BUS_MAX 505 int "Max I2C busses" 506 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA 507 default 2 if TI816X 508 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE 509 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X 510 default 5 if OMAP54XX 511 help 512 Define the maximum number of available I2C buses. 513 514config SYS_I2C_XILINX_XIIC 515 bool "Xilinx AXI I2C driver" 516 depends on DM_I2C 517 help 518 Support for Xilinx AXI I2C controller. 519 520config SYS_I2C_IHS 521 bool "gdsys IHS I2C driver" 522 depends on DM_I2C 523 help 524 Support for gdsys IHS I2C driver on FPGA bus. 525 526source "drivers/i2c/muxes/Kconfig" 527 528endmenu 529