1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015 MediaTek Inc. 4 */ 5 6 #ifndef __MTK_MMSYS_H 7 #define __MTK_MMSYS_H 8 9 enum mtk_ddp_comp_id; 10 struct device; 11 12 enum mtk_ddp_comp_id { 13 DDP_COMPONENT_AAL0, 14 DDP_COMPONENT_AAL1, 15 DDP_COMPONENT_BLS, 16 DDP_COMPONENT_CCORR, 17 DDP_COMPONENT_COLOR0, 18 DDP_COMPONENT_COLOR1, 19 DDP_COMPONENT_DITHER, 20 DDP_COMPONENT_DPI0, 21 DDP_COMPONENT_DPI1, 22 DDP_COMPONENT_DSI0, 23 DDP_COMPONENT_DSI1, 24 DDP_COMPONENT_DSI2, 25 DDP_COMPONENT_DSI3, 26 DDP_COMPONENT_GAMMA, 27 DDP_COMPONENT_OD0, 28 DDP_COMPONENT_OD1, 29 DDP_COMPONENT_OVL0, 30 DDP_COMPONENT_OVL_2L0, 31 DDP_COMPONENT_OVL_2L1, 32 DDP_COMPONENT_OVL_2L2, 33 DDP_COMPONENT_OVL1, 34 DDP_COMPONENT_POSTMASK0, 35 DDP_COMPONENT_PWM0, 36 DDP_COMPONENT_PWM1, 37 DDP_COMPONENT_PWM2, 38 DDP_COMPONENT_RDMA0, 39 DDP_COMPONENT_RDMA1, 40 DDP_COMPONENT_RDMA2, 41 DDP_COMPONENT_RDMA4, 42 DDP_COMPONENT_UFOE, 43 DDP_COMPONENT_WDMA0, 44 DDP_COMPONENT_WDMA1, 45 DDP_COMPONENT_ID_MAX, 46 }; 47 48 void mtk_mmsys_ddp_connect(struct device *dev, 49 enum mtk_ddp_comp_id cur, 50 enum mtk_ddp_comp_id next); 51 52 void mtk_mmsys_ddp_disconnect(struct device *dev, 53 enum mtk_ddp_comp_id cur, 54 enum mtk_ddp_comp_id next); 55 56 #endif /* __MTK_MMSYS_H */ 57