1 /******************************************************************************
2  * arch-x86/xen.h
3  *
4  * Guest OS interface to x86 Xen.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Copyright (c) 2004-2006, K A Fraser
25  */
26 
27 #include "../xen.h"
28 
29 #ifndef __XEN_PUBLIC_ARCH_X86_XEN_H__
30 #define __XEN_PUBLIC_ARCH_X86_XEN_H__
31 
32 /* Structural guest handles introduced in 0x00030201. */
33 #if __XEN_INTERFACE_VERSION__ >= 0x00030201
34 #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
35     typedef struct { type *p; } __guest_handle_ ## name
36 #else
37 #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
38     typedef type * __guest_handle_ ## name
39 #endif
40 
41 /*
42  * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
43  * in a struct in memory.
44  * XEN_GUEST_HANDLE_PARAM represent a guest pointer, when passed as an
45  * hypercall argument.
46  * XEN_GUEST_HANDLE_PARAM and XEN_GUEST_HANDLE are the same on X86 but
47  * they might not be on other architectures.
48  */
49 #define __DEFINE_XEN_GUEST_HANDLE(name, type) \
50     ___DEFINE_XEN_GUEST_HANDLE(name, type);   \
51     ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
52 #define DEFINE_XEN_GUEST_HANDLE(name)   __DEFINE_XEN_GUEST_HANDLE(name, name)
53 #define __XEN_GUEST_HANDLE(name)        __guest_handle_ ## name
54 #define XEN_GUEST_HANDLE(name)          __XEN_GUEST_HANDLE(name)
55 #define XEN_GUEST_HANDLE_PARAM(name)    XEN_GUEST_HANDLE(name)
56 #define set_xen_guest_handle_raw(hnd, val)  do { (hnd).p = val; } while (0)
57 #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
58 
59 #if defined(__i386__)
60 # ifdef __XEN__
61 __DeFiNe__ __DECL_REG_LO8(which) uint32_t e ## which ## x
62 __DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name; }
63 # endif
64 #include "xen-x86_32.h"
65 # ifdef __XEN__
66 __UnDeF__ __DECL_REG_LO8
67 __UnDeF__ __DECL_REG_LO16
68 __DeFiNe__ __DECL_REG_LO8(which) e ## which ## x
69 __DeFiNe__ __DECL_REG_LO16(name) e ## name
70 # endif
71 #elif defined(__x86_64__)
72 #include "xen-x86_64.h"
73 #endif
74 
75 #ifndef __ASSEMBLY__
76 typedef unsigned long xen_pfn_t;
77 #define PRI_xen_pfn "lx"
78 #define PRIu_xen_pfn "lu"
79 #endif
80 
81 #define XEN_HAVE_PV_GUEST_ENTRY 1
82 
83 #define XEN_HAVE_PV_UPCALL_MASK 1
84 
85 /*
86  * `incontents 200 segdesc Segment Descriptor Tables
87  */
88 /*
89  * ` enum neg_errnoval
90  * ` HYPERVISOR_set_gdt(const xen_pfn_t frames[], unsigned int entries);
91  * `
92  */
93 /*
94  * A number of GDT entries are reserved by Xen. These are not situated at the
95  * start of the GDT because some stupid OSes export hard-coded selector values
96  * in their ABI. These hard-coded values are always near the start of the GDT,
97  * so Xen places itself out of the way, at the far end of the GDT.
98  *
99  * NB The LDT is set using the MMUEXT_SET_LDT op of HYPERVISOR_mmuext_op
100  */
101 #define FIRST_RESERVED_GDT_PAGE  14
102 #define FIRST_RESERVED_GDT_BYTE  (FIRST_RESERVED_GDT_PAGE * 4096)
103 #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
104 
105 
106 /*
107  * ` enum neg_errnoval
108  * ` HYPERVISOR_update_descriptor(u64 pa, u64 desc);
109  * `
110  * ` @pa   The machine physical address of the descriptor to
111  * `       update. Must be either a descriptor page or writable.
112  * ` @desc The descriptor value to update, in the same format as a
113  * `       native descriptor table entry.
114  */
115 
116 /* Maximum number of virtual CPUs in legacy multi-processor guests. */
117 #define XEN_LEGACY_MAX_VCPUS 32
118 
119 #ifndef __ASSEMBLY__
120 
121 typedef unsigned long xen_ulong_t;
122 #define PRI_xen_ulong "lx"
123 
124 /*
125  * ` enum neg_errnoval
126  * ` HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp);
127  * `
128  * Sets the stack segment and pointer for the current vcpu.
129  */
130 
131 /*
132  * ` enum neg_errnoval
133  * ` HYPERVISOR_set_trap_table(const struct trap_info traps[]);
134  * `
135  */
136 /*
137  * Send an array of these to HYPERVISOR_set_trap_table().
138  * Terminate the array with a sentinel entry, with traps[].address==0.
139  * The privilege level specifies which modes may enter a trap via a software
140  * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
141  * privilege levels as follows:
142  *  Level == 0: Noone may enter
143  *  Level == 1: Kernel may enter
144  *  Level == 2: Kernel may enter
145  *  Level == 3: Everyone may enter
146  */
147 #define TI_GET_DPL(_ti)      ((_ti)->flags & 3)
148 #define TI_GET_IF(_ti)       ((_ti)->flags & 4)
149 #define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
150 #define TI_SET_IF(_ti,_if)   ((_ti)->flags |= ((!!(_if))<<2))
151 struct trap_info {
152     uint8_t       vector;  /* exception vector                              */
153     uint8_t       flags;   /* 0-3: privilege level; 4: clear event enable?  */
154     uint16_t      cs;      /* code selector                                 */
155     unsigned long address; /* code offset                                   */
156 };
157 typedef struct trap_info trap_info_t;
158 DEFINE_XEN_GUEST_HANDLE(trap_info_t);
159 
160 typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
161 
162 /*
163  * The following is all CPU context. Note that the fpu_ctxt block is filled
164  * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
165  *
166  * Also note that when calling DOMCTL_setvcpucontext for HVM guests, not all
167  * information in this structure is updated, the fields read include: fpu_ctxt
168  * (if VGCT_I387_VALID is set), flags, user_regs and debugreg[*].
169  *
170  * Note: VCPUOP_initialise for HVM guests is non-symetric with
171  * DOMCTL_setvcpucontext, and uses struct vcpu_hvm_context from hvm/hvm_vcpu.h
172  */
173 struct vcpu_guest_context {
174     /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
175     struct { char x[512]; } fpu_ctxt;       /* User-level FPU registers     */
176 #define VGCF_I387_VALID                (1<<0)
177 #define VGCF_IN_KERNEL                 (1<<2)
178 #define _VGCF_i387_valid               0
179 #define VGCF_i387_valid                (1<<_VGCF_i387_valid)
180 #define _VGCF_in_kernel                2
181 #define VGCF_in_kernel                 (1<<_VGCF_in_kernel)
182 #define _VGCF_failsafe_disables_events 3
183 #define VGCF_failsafe_disables_events  (1<<_VGCF_failsafe_disables_events)
184 #define _VGCF_syscall_disables_events  4
185 #define VGCF_syscall_disables_events   (1<<_VGCF_syscall_disables_events)
186 #define _VGCF_online                   5
187 #define VGCF_online                    (1<<_VGCF_online)
188     unsigned long flags;                    /* VGCF_* flags                 */
189     struct cpu_user_regs user_regs;         /* User-level CPU registers     */
190     struct trap_info trap_ctxt[256];        /* Virtual IDT                  */
191     unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
192     unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
193     unsigned long kernel_ss, kernel_sp;     /* Virtual TSS (only SS1/SP1)   */
194     /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
195     unsigned long ctrlreg[8];               /* CR0-CR7 (control registers)  */
196     unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
197 #ifdef __i386__
198     unsigned long event_callback_cs;        /* CS:EIP of event callback     */
199     unsigned long event_callback_eip;
200     unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
201     unsigned long failsafe_callback_eip;
202 #else
203     unsigned long event_callback_eip;
204     unsigned long failsafe_callback_eip;
205 #ifdef __XEN__
206     union {
207         unsigned long syscall_callback_eip;
208         struct {
209             unsigned int event_callback_cs;    /* compat CS of event cb     */
210             unsigned int failsafe_callback_cs; /* compat CS of failsafe cb  */
211         };
212     };
213 #else
214     unsigned long syscall_callback_eip;
215 #endif
216 #endif
217     unsigned long vm_assist;                /* VMASST_TYPE_* bitmap */
218 #ifdef __x86_64__
219     /* Segment base addresses. */
220     uint64_t      fs_base;
221     uint64_t      gs_base_kernel;
222     uint64_t      gs_base_user;
223 #endif
224 };
225 typedef struct vcpu_guest_context vcpu_guest_context_t;
226 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
227 
228 struct arch_shared_info {
229     /*
230      * Number of valid entries in the p2m table(s) anchored at
231      * pfn_to_mfn_frame_list_list and/or p2m_vaddr.
232      */
233     unsigned long max_pfn;
234     /*
235      * Frame containing list of mfns containing list of mfns containing p2m.
236      * A value of 0 indicates it has not yet been set up, ~0 indicates it has
237      * been set to invalid e.g. due to the p2m being too large for the 3-level
238      * p2m tree. In this case the linear mapper p2m list anchored at p2m_vaddr
239      * is to be used.
240      */
241     xen_pfn_t     pfn_to_mfn_frame_list_list;
242     unsigned long nmi_reason;
243     /*
244      * Following three fields are valid if p2m_cr3 contains a value different
245      * from 0.
246      * p2m_cr3 is the root of the address space where p2m_vaddr is valid.
247      * p2m_cr3 is in the same format as a cr3 value in the vcpu register state
248      * and holds the folded machine frame number (via xen_pfn_to_cr3) of a
249      * L3 or L4 page table.
250      * p2m_vaddr holds the virtual address of the linear p2m list. All entries
251      * in the range [0...max_pfn[ are accessible via this pointer.
252      * p2m_generation will be incremented by the guest before and after each
253      * change of the mappings of the p2m list. p2m_generation starts at 0 and
254      * a value with the least significant bit set indicates that a mapping
255      * update is in progress. This allows guest external software (e.g. in Dom0)
256      * to verify that read mappings are consistent and whether they have changed
257      * since the last check.
258      * Modifying a p2m element in the linear p2m list is allowed via an atomic
259      * write only.
260      */
261     unsigned long p2m_cr3;         /* cr3 value of the p2m address space */
262     unsigned long p2m_vaddr;       /* virtual address of the p2m list */
263     unsigned long p2m_generation;  /* generation count of p2m mapping */
264 #ifdef __i386__
265     /* There's no room for this field in the generic structure. */
266     uint32_t wc_sec_hi;
267 #endif
268 };
269 typedef struct arch_shared_info arch_shared_info_t;
270 
271 #if defined(__XEN__) || defined(__XEN_TOOLS__)
272 /*
273  * struct xen_arch_domainconfig's ABI is covered by
274  * XEN_DOMCTL_INTERFACE_VERSION.
275  */
276 struct xen_arch_domainconfig {
277 #define _XEN_X86_EMU_LAPIC          0
278 #define XEN_X86_EMU_LAPIC           (1U<<_XEN_X86_EMU_LAPIC)
279 #define _XEN_X86_EMU_HPET           1
280 #define XEN_X86_EMU_HPET            (1U<<_XEN_X86_EMU_HPET)
281 #define _XEN_X86_EMU_PM             2
282 #define XEN_X86_EMU_PM              (1U<<_XEN_X86_EMU_PM)
283 #define _XEN_X86_EMU_RTC            3
284 #define XEN_X86_EMU_RTC             (1U<<_XEN_X86_EMU_RTC)
285 #define _XEN_X86_EMU_IOAPIC         4
286 #define XEN_X86_EMU_IOAPIC          (1U<<_XEN_X86_EMU_IOAPIC)
287 #define _XEN_X86_EMU_PIC            5
288 #define XEN_X86_EMU_PIC             (1U<<_XEN_X86_EMU_PIC)
289 #define _XEN_X86_EMU_VGA            6
290 #define XEN_X86_EMU_VGA             (1U<<_XEN_X86_EMU_VGA)
291 #define _XEN_X86_EMU_IOMMU          7
292 #define XEN_X86_EMU_IOMMU           (1U<<_XEN_X86_EMU_IOMMU)
293 #define _XEN_X86_EMU_PIT            8
294 #define XEN_X86_EMU_PIT             (1U<<_XEN_X86_EMU_PIT)
295 #define _XEN_X86_EMU_USE_PIRQ       9
296 #define XEN_X86_EMU_USE_PIRQ        (1U<<_XEN_X86_EMU_USE_PIRQ)
297 #define _XEN_X86_EMU_VPCI           10
298 #define XEN_X86_EMU_VPCI            (1U<<_XEN_X86_EMU_VPCI)
299 
300 #define XEN_X86_EMU_ALL             (XEN_X86_EMU_LAPIC | XEN_X86_EMU_HPET |  \
301                                      XEN_X86_EMU_PM | XEN_X86_EMU_RTC |      \
302                                      XEN_X86_EMU_IOAPIC | XEN_X86_EMU_PIC |  \
303                                      XEN_X86_EMU_VGA | XEN_X86_EMU_IOMMU |   \
304                                      XEN_X86_EMU_PIT | XEN_X86_EMU_USE_PIRQ |\
305                                      XEN_X86_EMU_VPCI)
306     uint32_t emulation_flags;
307 };
308 
309 /* Location of online VCPU bitmap. */
310 #define XEN_ACPI_CPU_MAP             0xaf00
311 #define XEN_ACPI_CPU_MAP_LEN         ((HVM_MAX_VCPUS + 7) / 8)
312 
313 /* GPE0 bit set during CPU hotplug */
314 #define XEN_ACPI_GPE0_CPUHP_BIT      2
315 #endif
316 
317 /*
318  * Representations of architectural CPUID and MSR information.  Used as the
319  * serialised version of Xen's internal representation.
320  */
321 typedef struct xen_cpuid_leaf {
322 #define XEN_CPUID_NO_SUBLEAF 0xffffffffu
323     uint32_t leaf, subleaf;
324     uint32_t a, b, c, d;
325 } xen_cpuid_leaf_t;
326 DEFINE_XEN_GUEST_HANDLE(xen_cpuid_leaf_t);
327 
328 typedef struct xen_msr_entry {
329     uint32_t idx;
330     uint32_t flags; /* Reserved MBZ. */
331     uint64_t val;
332 } xen_msr_entry_t;
333 DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t);
334 
335 #endif /* !__ASSEMBLY__ */
336 
337 /*
338  * ` enum neg_errnoval
339  * ` HYPERVISOR_fpu_taskswitch(int set);
340  * `
341  * Sets (if set!=0) or clears (if set==0) CR0.TS.
342  */
343 
344 /*
345  * ` enum neg_errnoval
346  * ` HYPERVISOR_set_debugreg(int regno, unsigned long value);
347  *
348  * ` unsigned long
349  * ` HYPERVISOR_get_debugreg(int regno);
350  * For 0<=reg<=7, returns the debug register value.
351  * For other values of reg, returns ((unsigned long)-EINVAL).
352  * (Unfortunately, this interface is defective.)
353  */
354 
355 /*
356  * Prefix forces emulation of some non-trapping instructions.
357  * Currently only CPUID.
358  */
359 #ifdef __ASSEMBLY__
360 #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ;
361 #define XEN_CPUID          XEN_EMULATE_PREFIX cpuid
362 #else
363 #define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; "
364 #define XEN_CPUID          XEN_EMULATE_PREFIX "cpuid"
365 #endif
366 
367 /*
368  * Debug console IO port, also called "port E9 hack". Each character written
369  * to this IO port will be printed on the hypervisor console, subject to log
370  * level restrictions.
371  */
372 #define XEN_HVM_DEBUGCONS_IOPORT 0xe9
373 
374 #endif /* __XEN_PUBLIC_ARCH_X86_XEN_H__ */
375 
376 /*
377  * Local variables:
378  * mode: C
379  * c-file-style: "BSD"
380  * c-basic-offset: 4
381  * tab-width: 4
382  * indent-tabs-mode: nil
383  * End:
384  */
385