1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * rt711-sdca.h -- RT711 SDCA ALSA SoC audio driver header
4  *
5  * Copyright(c) 2021 Realtek Semiconductor Corp.
6  */
7 
8 #ifndef __RT711_SDCA_H__
9 #define __RT711_SDCA_H__
10 
11 #include <linux/pm.h>
12 #include <linux/regmap.h>
13 #include <linux/soundwire/sdw.h>
14 #include <linux/soundwire/sdw_type.h>
15 #include <sound/soc.h>
16 #include <linux/workqueue.h>
17 
18 struct  rt711_sdca_priv {
19 	struct regmap *regmap, *mbq_regmap;
20 	struct snd_soc_component *component;
21 	struct sdw_slave *slave;
22 	enum sdw_slave_status status;
23 	struct sdw_bus_params params;
24 	bool hw_init;
25 	bool first_hw_init;
26 	struct snd_soc_jack *hs_jack;
27 	struct delayed_work jack_detect_work;
28 	struct delayed_work jack_btn_check_work;
29 	struct mutex calibrate_mutex; /* for headset calibration */
30 	struct mutex disable_irq_lock; /* SDCA irq lock protection */
31 	bool disable_irq;
32 	int jack_type, jd_src;
33 	unsigned int scp_sdca_stat1, scp_sdca_stat2;
34 	int hw_ver;
35 	bool fu0f_dapm_mute, fu0f_mixer_l_mute, fu0f_mixer_r_mute;
36 	bool fu1e_dapm_mute, fu1e_mixer_l_mute, fu1e_mixer_r_mute;
37 };
38 
39 struct sdw_stream_data {
40 	struct sdw_stream_runtime *sdw_stream;
41 };
42 
43 /* NID */
44 #define RT711_AUDIO_FUNCTION_GROUP			0x01
45 #define RT711_DAC_OUT2					0x03
46 #define RT711_ADC_IN1					0x09
47 #define RT711_ADC_IN2					0x08
48 #define RT711_DMIC1					0x12
49 #define RT711_DMIC2					0x13
50 #define RT711_MIC2					0x19
51 #define RT711_LINE1					0x1a
52 #define RT711_LINE2					0x1b
53 #define RT711_BEEP					0x1d
54 #define RT711_VENDOR_REG				0x20
55 #define RT711_HP_OUT					0x21
56 #define RT711_MIXER_IN1					0x22
57 #define RT711_MIXER_IN2					0x23
58 #define RT711_INLINE_CMD				0x55
59 #define RT711_VENDOR_CALI				0x58
60 #define RT711_VENDOR_IMS_DRE				0x5b
61 #define RT711_VENDOR_VAD				0x5e
62 #define RT711_VENDOR_ANALOG_CTL				0x5f
63 #define RT711_VENDOR_HDA_CTL				0x61
64 
65 /* Index (NID:20h) */
66 #define RT711_JD_PRODUCT_NUM			0x00
67 #define RT711_DMIC_CTL1					0x06
68 #define RT711_JD_CTL1					0x08
69 #define RT711_JD_CTL2					0x09
70 #define RT711_CC_DET1					0x11
71 #define RT711_PARA_VERB_CTL				0x1a
72 #define RT711_COMBO_JACK_AUTO_CTL1			0x45
73 #define RT711_COMBO_JACK_AUTO_CTL2			0x46
74 #define RT711_COMBO_JACK_AUTO_CTL3			0x47
75 #define RT711_INLINE_CMD_CTL				0x48
76 #define RT711_DIGITAL_MISC_CTRL4			0x4a
77 #define RT711_JD_CTRL6			0x6a
78 #define RT711_VREFOUT_CTL				0x6b
79 #define RT711_GPIO_TEST_MODE_CTL2			0x6d
80 #define RT711_FSM_CTL					0x6f
81 #define RT711_IRQ_FLAG_TABLE1				0x80
82 #define RT711_IRQ_FLAG_TABLE2				0x81
83 #define RT711_IRQ_FLAG_TABLE3				0x82
84 #define RT711_HP_FSM_CTL				0x83
85 #define RT711_TX_RX_MUX_CTL				0x91
86 #define RT711_FILTER_SRC_SEL				0xb0
87 #define RT711_ADC27_VOL_SET				0xb7
88 
89 /* Index (NID:58h) */
90 #define RT711_DAC_DC_CALI_CTL1				0x00
91 #define RT711_DAC_DC_CALI_CTL2				0x01
92 
93 /* Index (NID:5bh) */
94 #define RT711_IMS_DIGITAL_CTL1				0x00
95 #define RT711_HP_IMS_RESULT_L				0x20
96 #define RT711_HP_IMS_RESULT_R				0x21
97 
98 /* Index (NID:5eh) */
99 #define RT711_VAD_SRAM_CTL1				0x10
100 
101 /* Index (NID:5fh) */
102 #define RT711_MISC_POWER_CTL0				0x01
103 #define RT711_MISC_POWER_CTL4				0x05
104 
105 /* Index (NID:61h) */
106 #define RT711_HDA_LEGACY_MUX_CTL1			0x00
107 #define RT711_HDA_LEGACY_UNSOLICITED_CTL	0x03
108 #define RT711_HDA_LEGACY_CONFIG_CTL			0x06
109 #define RT711_HDA_LEGACY_RESET_CTL			0x08
110 #define RT711_HDA_LEGACY_GPIO_CTL			0x0a
111 #define RT711_ADC08_09_PDE_CTL				0x24
112 #define RT711_GE_MODE_RELATED_CTL			0x35
113 #define RT711_PUSH_BTN_INT_CTL0				0x36
114 #define RT711_PUSH_BTN_INT_CTL1				0x37
115 #define RT711_PUSH_BTN_INT_CTL2				0x38
116 #define RT711_PUSH_BTN_INT_CTL6				0x3c
117 #define RT711_PUSH_BTN_INT_CTL7				0x3d
118 #define RT711_PUSH_BTN_INT_CTL9				0x3f
119 
120 /* DAC DC offset calibration control-1 (0x00)(NID:20h) */
121 #define RT711_DAC_DC_CALI_TRIGGER (0x1 << 15)
122 #define RT711_DAC_DC_CALI_CLK_EN (0x1 << 14)
123 #define RT711_DAC_DC_FORCE_CALI_RST (0x1 << 3)
124 
125 /* jack detect control 1 (0x08)(NID:20h) */
126 #define RT711_JD2_DIGITAL_MODE_SEL (0x1 << 1)
127 
128 /* jack detect control 2 (0x09)(NID:20h) */
129 #define RT711_JD2_2PORT_200K_DECODE_HP (0x1 << 13)
130 #define RT711_HP_JD_SEL_JD1 (0x0 << 1)
131 #define RT711_HP_JD_SEL_JD2 (0x1 << 1)
132 
133 /* CC DET1 (0x11)(NID:20h) */
134 #define RT711_HP_JD_FINAL_RESULT_CTL_JD12 (0x1 << 10)
135 #define RT711_HP_JD_FINAL_RESULT_CTL_CCDET (0x0 << 10)
136 
137 /* Parameter & Verb control (0x1a)(NID:20h) */
138 #define RT711_HIDDEN_REG_SW_RESET (0x1 << 14)
139 
140 /* combo jack auto switch control 2 (0x46)(NID:20h) */
141 #define RT711_COMBOJACK_AUTO_DET_STATUS			(0x1 << 11)
142 #define RT711_COMBOJACK_AUTO_DET_TRS			(0x1 << 10)
143 #define RT711_COMBOJACK_AUTO_DET_CTIA			(0x1 << 9)
144 #define RT711_COMBOJACK_AUTO_DET_OMTP			(0x1 << 8)
145 
146 /* FSM control (0x6f)(NID:20h) */
147 #define RT711_CALI_CTL			(0x0 << 0)
148 #define RT711_COMBOJACK_CTL		(0x1 << 0)
149 #define RT711_IMS_CTL			(0x2 << 0)
150 #define RT711_DEPOP_CTL			(0x3 << 0)
151 #define RT711_FSM_IMP_EN		(0x1 << 6)
152 
153 /* Impedance Sense Digital Control 1 (0x00)(NID:5bh) */
154 #define RT711_TRIGGER_IMS		(0x1 << 15)
155 #define RT711_IMS_EN			(0x1 << 6)
156 
157 #define RT711_EAPD_HIGH				0x2
158 #define RT711_EAPD_LOW				0x0
159 #define RT711_MUTE_SFT				7
160 /* set input/output mapping to payload[14][15] separately */
161 #define RT711_DIR_IN_SFT			6
162 #define RT711_DIR_OUT_SFT			7
163 
164 /* RC Calibration register */
165 #define RT711_RC_CAL_STATUS			0x320c
166 
167 /* Buffer address for HID */
168 #define RT711_BUF_ADDR_HID1			0x44030000
169 #define RT711_BUF_ADDR_HID2			0x44030020
170 
171 /* RT711 SDCA Control - function number */
172 #define FUNC_NUM_JACK_CODEC 0x01
173 #define FUNC_NUM_MIC_ARRAY 0x02
174 #define FUNC_NUM_HID 0x03
175 
176 /* RT711 SDCA entity */
177 #define RT711_SDCA_ENT_HID01 0x01
178 #define RT711_SDCA_ENT_GE49 0x49
179 #define RT711_SDCA_ENT_USER_FU05 0x05
180 #define RT711_SDCA_ENT_USER_FU0F 0x0f
181 #define RT711_SDCA_ENT_USER_FU1E 0x1e
182 #define RT711_SDCA_ENT_PLATFORM_FU15 0x15
183 #define RT711_SDCA_ENT_PLATFORM_FU44 0x44
184 #define RT711_SDCA_ENT_PDE28 0x28
185 #define RT711_SDCA_ENT_PDE29 0x29
186 #define RT711_SDCA_ENT_PDE2A 0x2a
187 #define RT711_SDCA_ENT_CS01 0x01
188 #define RT711_SDCA_ENT_CS11 0x11
189 #define RT711_SDCA_ENT_CS1F 0x1f
190 #define RT711_SDCA_ENT_OT1 0x06
191 #define RT711_SDCA_ENT_LINE1 0x09
192 #define RT711_SDCA_ENT_LINE2 0x31
193 #define RT711_SDCA_ENT_PDELINE2 0x36
194 #define RT711_SDCA_ENT_USER_FU9 0x41
195 
196 /* RT711 SDCA control */
197 #define RT711_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10
198 #define RT711_SDCA_CTL_FU_CH_GAIN 0x0b
199 #define RT711_SDCA_CTL_FU_MUTE 0x01
200 #define RT711_SDCA_CTL_FU_VOLUME 0x02
201 #define RT711_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10
202 #define RT711_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11
203 #define RT711_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12
204 #define RT711_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13
205 #define RT711_SDCA_CTL_SELECTED_MODE 0x01
206 #define RT711_SDCA_CTL_DETECTED_MODE 0x02
207 #define RT711_SDCA_CTL_REQ_POWER_STATE 0x01
208 #define RT711_SDCA_CTL_VENDOR_DEF 0x30
209 
210 /* RT711 SDCA channel */
211 #define CH_L 0x01
212 #define CH_R 0x02
213 
214 /* sample frequency index */
215 #define RT711_SDCA_RATE_44100HZ		0x08
216 #define RT711_SDCA_RATE_48000HZ		0x09
217 #define RT711_SDCA_RATE_96000HZ		0x0b
218 #define RT711_SDCA_RATE_192000HZ	0x0d
219 
220 enum {
221 	RT711_AIF1,
222 	RT711_AIF2,
223 	RT711_AIFS,
224 };
225 
226 enum rt711_sdca_jd_src {
227 	RT711_JD_NULL,
228 	RT711_JD1,
229 	RT711_JD2
230 };
231 
232 enum rt711_sdca_ver {
233 	RT711_VER_VD0,
234 	RT711_VER_VD1
235 };
236 
237 int rt711_sdca_io_init(struct device *dev, struct sdw_slave *slave);
238 int rt711_sdca_init(struct device *dev, struct regmap *regmap,
239 	       struct regmap *mbq_regmap, struct sdw_slave *slave);
240 
241 int rt711_sdca_jack_detect(struct rt711_sdca_priv *rt711, bool *hp, bool *mic);
242 #endif /* __RT711_SDCA_H__ */
243