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Searched defs:GICD_BASE (Results 1 – 18 of 18) sorted by relevance

/u-boot/include/configs/
A Dsun50i.h14 #define GICD_BASE 0x1c81000 macro
17 #define GICD_BASE 0x3021000 macro
A Dmeson64.h12 #define GICD_BASE 0xffc01000 macro
15 #define GICD_BASE 0xc4301000 macro
A Dvexpress_aemv8a.h75 #define GICD_BASE (0x2f000000) macro
80 #define GICD_BASE (0x2f000000) macro
83 #define GICD_BASE (0x2C010000) macro
A Dhikey960.h33 #define GICD_BASE 0xe82b1000 macro
A Dpx30_common.h30 #define GICD_BASE 0xff131000 macro
A Dhikey.h44 #define GICD_BASE 0xf6801000 macro
A Dthunderx_88xx.h36 #define GICD_BASE (0x801000000000) macro
A Drcar-gen3-common.h28 #define GICD_BASE 0xF1010000 macro
A Dpresidio_asic.h27 #define GICD_BASE 0xf7011000 macro
A Ds32v234evb.h17 #define GICD_BASE 0x7D001000 macro
A Dxilinx_versal.h18 #define GICD_BASE 0xF9000000 macro
A Dxilinx_zynqmp.h19 #define GICD_BASE 0xF9010000 macro
/u-boot/arch/arm/include/asm/arch-tegra186/
A Dtegra.h9 #define GICD_BASE 0x03881000 /* Generic Int Cntrlr Distrib */ macro
/u-boot/arch/arm/include/asm/arch-tegra210/
A Dtegra.h10 #define GICD_BASE 0x50041000 /* Generic Int Cntrlr Distrib */ macro
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dconfig.h52 #define GICD_BASE 0x06000000 macro
146 #define GICD_BASE 0x06000000 macro
217 #define GICD_BASE 0x06000000 macro
267 #define GICD_BASE 0x06000000 macro
341 #define GICD_BASE 0x01401000 macro
369 #define GICD_BASE 0x01401000 macro
400 #define GICD_BASE 0x01410000 macro
/u-boot/arch/arm/mach-snapdragon/include/mach/
A Dsysmap-apq8016.h10 #define GICD_BASE (0x0b000000) macro
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dbase_addr_s10.h44 #define GICD_BASE 0xfffc1000 macro
/u-boot/arch/arm/cpu/armv7/sunxi/
A Dpsci.c27 #define GICD_BASE (SUNXI_GIC400_BASE + GIC_DIST_OFFSET) macro

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