1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
5 * Changes for multibus/multiadapter I2C support.
6 *
7 * (C) Copyright 2001
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 *
10 * The original I2C interface was
11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
12 * AIRVENT SAM s.p.a - RIMINI(ITALY)
13 * but has been changed substantially.
14 */
15
16 #ifndef _I2C_H_
17 #define _I2C_H_
18
19 #include <linker_lists.h>
20
21 /*
22 * For now there are essentially two parts to this file - driver model
23 * here at the top, and the older code below (with CONFIG_SYS_I2C being
24 * most recent). The plan is to migrate everything to driver model.
25 * The driver model structures and API are separate as they are different
26 * enough as to be incompatible for compilation purposes.
27 */
28
29 enum dm_i2c_chip_flags {
30 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
31 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
32 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
33 };
34
35 /** enum i2c_speed_mode - standard I2C speed modes */
36 enum i2c_speed_mode {
37 IC_SPEED_MODE_STANDARD,
38 IC_SPEED_MODE_FAST,
39 IC_SPEED_MODE_FAST_PLUS,
40 IC_SPEED_MODE_HIGH,
41 IC_SPEED_MODE_FAST_ULTRA,
42
43 IC_SPEED_MODE_COUNT,
44 };
45
46 /** enum i2c_speed_rate - standard I2C speeds in Hz */
47 enum i2c_speed_rate {
48 I2C_SPEED_STANDARD_RATE = 100000,
49 I2C_SPEED_FAST_RATE = 400000,
50 I2C_SPEED_FAST_PLUS_RATE = 1000000,
51 I2C_SPEED_HIGH_RATE = 3400000,
52 I2C_SPEED_FAST_ULTRA_RATE = 5000000,
53 };
54
55 /** enum i2c_address_mode - available address modes */
56 enum i2c_address_mode {
57 I2C_MODE_7_BIT,
58 I2C_MODE_10_BIT
59 };
60
61 /** enum i2c_device_t - Types of I2C devices, used for compatible strings */
62 enum i2c_device_t {
63 I2C_DEVICE_GENERIC,
64 I2C_DEVICE_HID_OVER_I2C,
65 };
66
67 struct udevice;
68 /**
69 * struct dm_i2c_chip - information about an i2c chip
70 *
71 * An I2C chip is a device on the I2C bus. It sits at a particular address
72 * and normally supports 7-bit or 10-bit addressing.
73 *
74 * To obtain this structure, use dev_get_parent_plat(dev) where dev is
75 * the chip to examine.
76 *
77 * @chip_addr: Chip address on bus
78 * @offset_len: Length of offset in bytes. A single byte offset can
79 * represent up to 256 bytes. A value larger than 1 may be
80 * needed for larger devices.
81 * @flags: Flags for this chip (dm_i2c_chip_flags)
82 * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
83 * devices which steal addresses as part of offset.
84 * If offset_len is zero, then the offset is encoded
85 * completely within the chip address itself.
86 * e.g. a devce with chip address of 0x2c with 512
87 * registers might use the bottom bit of the address
88 * to indicate which half of the address space is being
89 * accessed while still only using 1 byte offset.
90 * This means it will respond to chip address 0x2c and
91 * 0x2d.
92 * A real world example is the Atmel AT24C04. It's
93 * datasheet explains it's usage of this addressing
94 * mode.
95 * @emul: Emulator for this chip address (only used for emulation)
96 */
97 struct dm_i2c_chip {
98 uint chip_addr;
99 uint offset_len;
100 uint flags;
101 uint chip_addr_offset_mask;
102 #ifdef CONFIG_SANDBOX
103 struct udevice *emul;
104 bool test_mode;
105 #endif
106 };
107
108 /**
109 * struct dm_i2c_bus- information about an i2c bus
110 *
111 * An I2C bus contains 0 or more chips on it, each at its own address. The
112 * bus can operate at different speeds (measured in Hz, typically 100KHz
113 * or 400KHz).
114 *
115 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
116 * I2C bus udevice.
117 *
118 * @speed_hz: Bus speed in hertz (typically 100000)
119 * @max_transaction_bytes: Maximal size of single I2C transfer
120 */
121 struct dm_i2c_bus {
122 int speed_hz;
123 int max_transaction_bytes;
124 };
125
126 /*
127 * Not all of these flags are implemented in the U-Boot API
128 */
129 enum dm_i2c_msg_flags {
130 I2C_M_TEN = 0x0010, /* ten-bit chip address */
131 I2C_M_RD = 0x0001, /* read data, from slave to master */
132 I2C_M_STOP = 0x8000, /* send stop after this message */
133 I2C_M_NOSTART = 0x4000, /* no start before this message */
134 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
135 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
136 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
137 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
138 };
139
140 /**
141 * struct i2c_msg - an I2C message
142 *
143 * @addr: Slave address
144 * @flags: Flags (see enum dm_i2c_msg_flags)
145 * @len: Length of buffer in bytes, may be 0 for a probe
146 * @buf: Buffer to send/receive, or NULL if no data
147 */
148 struct i2c_msg {
149 uint addr;
150 uint flags;
151 uint len;
152 u8 *buf;
153 };
154
155 /**
156 * struct i2c_msg_list - a list of I2C messages
157 *
158 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
159 * appropriate in U-Boot.
160 *
161 * @msg: Pointer to i2c_msg array
162 * @nmsgs: Number of elements in the array
163 */
164 struct i2c_msg_list {
165 struct i2c_msg *msgs;
166 uint nmsgs;
167 };
168
169 /**
170 * dm_i2c_read() - read bytes from an I2C chip
171 *
172 * To obtain an I2C device (called a 'chip') given the I2C bus address you
173 * can use i2c_get_chip(). To obtain a bus by bus number use
174 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
175 *
176 * To set the address length of a devce use i2c_set_addr_len(). It
177 * defaults to 1.
178 *
179 * @dev: Chip to read from
180 * @offset: Offset within chip to start reading
181 * @buffer: Place to put data
182 * @len: Number of bytes to read
183 *
184 * @return 0 on success, -ve on failure
185 */
186 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
187
188 /**
189 * dm_i2c_write() - write bytes to an I2C chip
190 *
191 * See notes for dm_i2c_read() above.
192 *
193 * @dev: Chip to write to
194 * @offset: Offset within chip to start writing
195 * @buffer: Buffer containing data to write
196 * @len: Number of bytes to write
197 *
198 * @return 0 on success, -ve on failure
199 */
200 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
201 int len);
202
203 /**
204 * dm_i2c_probe() - probe a particular chip address
205 *
206 * This can be useful to check for the existence of a chip on the bus.
207 * It is typically implemented by writing the chip address to the bus
208 * and checking that the chip replies with an ACK.
209 *
210 * @bus: Bus to probe
211 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
212 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
213 * @devp: Returns the device found, or NULL if none
214 * @return 0 if a chip was found at that address, -ve if not
215 */
216 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
217 struct udevice **devp);
218
219 /**
220 * dm_i2c_reg_read() - Read a value from an I2C register
221 *
222 * This reads a single value from the given address in an I2C chip
223 *
224 * @dev: Device to use for transfer
225 * @addr: Address to read from
226 * @return value read, or -ve on error
227 */
228 int dm_i2c_reg_read(struct udevice *dev, uint offset);
229
230 /**
231 * dm_i2c_reg_write() - Write a value to an I2C register
232 *
233 * This writes a single value to the given address in an I2C chip
234 *
235 * @dev: Device to use for transfer
236 * @addr: Address to write to
237 * @val: Value to write (normally a byte)
238 * @return 0 on success, -ve on error
239 */
240 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
241
242 /**
243 * dm_i2c_xfer() - Transfer messages over I2C
244 *
245 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
246 * instead.
247 *
248 * @dev: Device to use for transfer
249 * @msg: List of messages to transfer
250 * @nmsgs: Number of messages to transfer
251 * @return 0 on success, -ve on error
252 */
253 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
254
255 /**
256 * dm_i2c_set_bus_speed() - set the speed of a bus
257 *
258 * @bus: Bus to adjust
259 * @speed: Requested speed in Hz
260 * @return 0 if OK, -EINVAL for invalid values
261 */
262 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
263
264 /**
265 * dm_i2c_get_bus_speed() - get the speed of a bus
266 *
267 * @bus: Bus to check
268 * @return speed of selected I2C bus in Hz, -ve on error
269 */
270 int dm_i2c_get_bus_speed(struct udevice *bus);
271
272 /**
273 * i2c_set_chip_flags() - set flags for a chip
274 *
275 * Typically addresses are 7 bits, but for 10-bit addresses you should set
276 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
277 *
278 * @dev: Chip to adjust
279 * @flags: New flags
280 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
281 */
282 int i2c_set_chip_flags(struct udevice *dev, uint flags);
283
284 /**
285 * i2c_get_chip_flags() - get flags for a chip
286 *
287 * @dev: Chip to check
288 * @flagsp: Place to put flags
289 * @return 0 if OK, other -ve value on error
290 */
291 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
292
293 /**
294 * i2c_set_offset_len() - set the offset length for a chip
295 *
296 * The offset used to access a chip may be up to 4 bytes long. Typically it
297 * is only 1 byte, which is enough for chips with 256 bytes of memory or
298 * registers. The default value is 1, but you can call this function to
299 * change it.
300 *
301 * @offset_len: New offset length value (typically 1 or 2)
302 */
303 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
304
305 /**
306 * i2c_get_offset_len() - get the offset length for a chip
307 *
308 * @return: Current offset length value (typically 1 or 2)
309 */
310 int i2c_get_chip_offset_len(struct udevice *dev);
311
312 /**
313 * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
314 *
315 * Some devices listen on multiple chip addresses to achieve larger offsets
316 * than their single or multiple byte offsets would allow for. You can use this
317 * function to set the bits that are valid to be used for offset overflow.
318 *
319 * @mask: The mask to be used for high offset bits within address
320 * @return 0 if OK, other -ve value on error
321 */
322 int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
323
324 /*
325 * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
326 *
327 * @return current chip addr offset mask
328 */
329 uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
330
331 /**
332 * i2c_deblock() - recover a bus that is in an unknown state
333 *
334 * See the deblock() method in 'struct dm_i2c_ops' for full information
335 *
336 * @bus: Bus to recover
337 * @return 0 if OK, -ve on error
338 */
339 int i2c_deblock(struct udevice *bus);
340
341 /**
342 * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
343 *
344 * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
345 * for deblocking the I2C bus.
346 *
347 * @sda_pin: SDA GPIO
348 * @scl_pin: SCL GPIO
349 * @scl_count: Number of SCL clock cycles generated to deblock SDA
350 * @start_count:Number of I2C start conditions sent after deblocking SDA
351 * @delay: Delay between SCL clock line changes
352 * @return 0 if OK, -ve on error
353 */
354 struct gpio_desc;
355 int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
356 unsigned int scl_count, unsigned int start_count,
357 unsigned int delay);
358
359 /**
360 * struct dm_i2c_ops - driver operations for I2C uclass
361 *
362 * Drivers should support these operations unless otherwise noted. These
363 * operations are intended to be used by uclass code, not directly from
364 * other code.
365 */
366 struct dm_i2c_ops {
367 /**
368 * xfer() - transfer a list of I2C messages
369 *
370 * @bus: Bus to read from
371 * @msg: List of messages to transfer
372 * @nmsgs: Number of messages in the list
373 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
374 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
375 * flags cannot be supported, other -ve value on some other error
376 */
377 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
378
379 /**
380 * probe_chip() - probe for the presense of a chip address
381 *
382 * This function is optional. If omitted, the uclass will send a zero
383 * length message instead.
384 *
385 * @bus: Bus to probe
386 * @chip_addr: Chip address to probe
387 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
388 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
389 * to default probem other -ve value on error
390 */
391 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
392
393 /**
394 * set_bus_speed() - set the speed of a bus (optional)
395 *
396 * The bus speed value will be updated by the uclass if this function
397 * does not return an error. This method is optional - if it is not
398 * provided then the driver can read the speed from
399 * dev_get_uclass_priv(bus)->speed_hz
400 *
401 * @bus: Bus to adjust
402 * @speed: Requested speed in Hz
403 * @return 0 if OK, -EINVAL for invalid values
404 */
405 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
406
407 /**
408 * get_bus_speed() - get the speed of a bus (optional)
409 *
410 * Normally this can be provided by the uclass, but if you want your
411 * driver to check the bus speed by looking at the hardware, you can
412 * implement that here. This method is optional. This method would
413 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
414 *
415 * @bus: Bus to check
416 * @return speed of selected I2C bus in Hz, -ve on error
417 */
418 int (*get_bus_speed)(struct udevice *bus);
419
420 /**
421 * set_flags() - set the flags for a chip (optional)
422 *
423 * This is generally implemented by the uclass, but drivers can
424 * check the value to ensure that unsupported options are not used.
425 * This method is optional. If provided, this method will always be
426 * called when the flags change.
427 *
428 * @dev: Chip to adjust
429 * @flags: New flags value
430 * @return 0 if OK, -EINVAL if value is unsupported
431 */
432 int (*set_flags)(struct udevice *dev, uint flags);
433
434 /**
435 * deblock() - recover a bus that is in an unknown state
436 *
437 * I2C is a synchronous protocol and resets of the processor in the
438 * middle of an access can block the I2C Bus until a powerdown of
439 * the full unit is done. This is because slaves can be stuck
440 * waiting for addition bus transitions for a transaction that will
441 * never complete. Resetting the I2C master does not help. The only
442 * way is to force the bus through a series of transitions to make
443 * sure that all slaves are done with the transaction. This method
444 * performs this 'deblocking' if support by the driver.
445 *
446 * This method is optional.
447 */
448 int (*deblock)(struct udevice *bus);
449 };
450
451 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
452
453 /**
454 * struct i2c_mux_ops - operations for an I2C mux
455 *
456 * The current mux state is expected to be stored in the mux itself since
457 * it is the only thing that knows how to make things work. The mux can
458 * record the current state and then avoid switching unless it is necessary.
459 * So select() can be skipped if the mux is already in the correct state.
460 * Also deselect() can be made a nop if required.
461 */
462 struct i2c_mux_ops {
463 /**
464 * select() - select one of of I2C buses attached to a mux
465 *
466 * This will be called when there is no bus currently selected by the
467 * mux. This method does not need to deselect the old bus since
468 * deselect() will be already have been called if necessary.
469 *
470 * @mux: Mux device
471 * @bus: I2C bus to select
472 * @channel: Channel number correponding to the bus to select
473 * @return 0 if OK, -ve on error
474 */
475 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
476
477 /**
478 * deselect() - select one of of I2C buses attached to a mux
479 *
480 * This is used to deselect the currently selected I2C bus.
481 *
482 * @mux: Mux device
483 * @bus: I2C bus to deselect
484 * @channel: Channel number correponding to the bus to deselect
485 * @return 0 if OK, -ve on error
486 */
487 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
488 };
489
490 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
491
492 /**
493 * i2c_get_chip() - get a device to use to access a chip on a bus
494 *
495 * This returns the device for the given chip address. The device can then
496 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
497 *
498 * @bus: Bus to examine
499 * @chip_addr: Chip address for the new device
500 * @offset_len: Length of a register offset in bytes (normally 1)
501 * @devp: Returns pointer to new device if found or -ENODEV if not
502 * found
503 */
504 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
505 struct udevice **devp);
506
507 /**
508 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
509 * a bus number
510 *
511 * This returns the device for the given chip address on a particular bus
512 * number.
513 *
514 * @busnum: Bus number to examine
515 * @chip_addr: Chip address for the new device
516 * @offset_len: Length of a register offset in bytes (normally 1)
517 * @devp: Returns pointer to new device if found or -ENODEV if not
518 * found
519 */
520 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
521 struct udevice **devp);
522
523 /**
524 * i2c_chip_of_to_plat() - Decode standard I2C platform data
525 *
526 * This decodes the chip address from a device tree node and puts it into
527 * its dm_i2c_chip structure. This should be called in your driver's
528 * of_to_plat() method.
529 *
530 * @blob: Device tree blob
531 * @node: Node offset to read from
532 * @spi: Place to put the decoded information
533 */
534 int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip);
535
536 /**
537 * i2c_dump_msgs() - Dump a list of I2C messages
538 *
539 * This may be useful for debugging.
540 *
541 * @msg: Message list to dump
542 * @nmsgs: Number of messages
543 */
544 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
545
546 /**
547 * i2c_emul_find() - Find an emulator for an i2c sandbox device
548 *
549 * This looks at the device's 'emul' phandle
550 *
551 * @dev: Device to find an emulator for
552 * @emulp: Returns the associated emulator, if found *
553 * @return 0 if OK, -ENOENT or -ENODEV if not found
554 */
555 int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
556
557 /**
558 * i2c_emul_get_device() - Find the device being emulated
559 *
560 * Given an emulator this returns the associated device
561 *
562 * @emul: Emulator for the device
563 * @return device that @emul is emulating
564 */
565 struct udevice *i2c_emul_get_device(struct udevice *emul);
566
567 /* ACPI operations for generic I2C devices */
568 extern struct acpi_ops i2c_acpi_ops;
569
570 /**
571 * acpi_i2c_of_to_plat() - Read properties intended for ACPI
572 *
573 * This reads the generic I2C properties from the device tree, so that these
574 * can be used to create ACPI information for the device.
575 *
576 * See the i2c/generic-acpi.txt binding file for information about the
577 * properties.
578 *
579 * @dev: I2C device to process
580 * @return 0 if OK, -EINVAL if acpi,hid is not present
581 */
582 int acpi_i2c_of_to_plat(struct udevice *dev);
583
584 #if !CONFIG_IS_ENABLED(DM_I2C)
585
586 /*
587 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
588 *
589 * The implementation MUST NOT use static or global variables if the
590 * I2C routines are used to read SDRAM configuration information
591 * because this is done before the memories are initialized. Limited
592 * use of stack-based variables are OK (the initial stack size is
593 * limited).
594 *
595 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
596 */
597
598 /*
599 * Configuration items.
600 */
601 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
602
603 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
604 /* no muxes used bus = i2c adapters */
605 #define CONFIG_SYS_I2C_DIRECT_BUS 1
606 #define CONFIG_SYS_I2C_MAX_HOPS 0
607 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
608 #else
609 /* we use i2c muxes */
610 #undef CONFIG_SYS_I2C_DIRECT_BUS
611 #endif
612
613 /* define the I2C bus number for RTC and DTT if not already done */
614 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
615 #define CONFIG_SYS_RTC_BUS_NUM 0
616 #endif
617 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
618 #define CONFIG_SYS_SPD_BUS_NUM 0
619 #endif
620
621 struct i2c_adapter {
622 void (*init)(struct i2c_adapter *adap, int speed,
623 int slaveaddr);
624 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
625 int (*read)(struct i2c_adapter *adap, uint8_t chip,
626 uint addr, int alen, uint8_t *buffer,
627 int len);
628 int (*write)(struct i2c_adapter *adap, uint8_t chip,
629 uint addr, int alen, uint8_t *buffer,
630 int len);
631 uint (*set_bus_speed)(struct i2c_adapter *adap,
632 uint speed);
633 int speed;
634 int waitdelay;
635 int slaveaddr;
636 int init_done;
637 int hwadapnr;
638 char *name;
639 };
640
641 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
642 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
643 { \
644 .init = _init, \
645 .probe = _probe, \
646 .read = _read, \
647 .write = _write, \
648 .set_bus_speed = _set_speed, \
649 .speed = _speed, \
650 .slaveaddr = _slaveaddr, \
651 .init_done = 0, \
652 .hwadapnr = _hwadapnr, \
653 .name = #_name \
654 };
655
656 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
657 _set_speed, _speed, _slaveaddr, _hwadapnr) \
658 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
659 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
660 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
661
662 struct i2c_adapter *i2c_get_adapter(int index);
663
664 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
665 struct i2c_mux {
666 int id;
667 char name[16];
668 };
669
670 struct i2c_next_hop {
671 struct i2c_mux mux;
672 uint8_t chip;
673 uint8_t channel;
674 };
675
676 struct i2c_bus_hose {
677 int adapter;
678 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
679 };
680 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
681 extern struct i2c_bus_hose i2c_bus[];
682
683 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
684 #else
685 #define I2C_ADAPTER(bus) bus
686 #endif
687 #define I2C_BUS gd->cur_i2c_bus
688
689 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
690 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
691 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
692
693 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
694 #define I2C_MUX_PCA9540_ID 1
695 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
696 #define I2C_MUX_PCA9542_ID 2
697 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
698 #define I2C_MUX_PCA9544_ID 3
699 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
700 #define I2C_MUX_PCA9547_ID 4
701 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
702 #define I2C_MUX_PCA9548_ID 5
703 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
704 #endif
705
706 #ifndef I2C_SOFT_DECLARATIONS
707 # if (defined(CONFIG_AT91RM9200) || \
708 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
709 defined(CONFIG_AT91SAM9263))
710 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
711 # else
712 # define I2C_SOFT_DECLARATIONS
713 # endif
714 #endif
715
716 /*
717 * Many boards/controllers/drivers don't support an I2C slave interface so
718 * provide a default slave address for them for use in common code. A real
719 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
720 * support a slave interface.
721 */
722 #ifndef CONFIG_SYS_I2C_SLAVE
723 #define CONFIG_SYS_I2C_SLAVE 0xfe
724 #endif
725
726 /*
727 * Initialization, must be called once on start up, may be called
728 * repeatedly to change the speed and slave addresses.
729 */
730 #ifdef CONFIG_SYS_I2C_EARLY_INIT
731 void i2c_early_init_f(void);
732 #endif
733 void i2c_init(int speed, int slaveaddr);
734 void i2c_init_board(void);
735
736 #ifdef CONFIG_SYS_I2C
737 /*
738 * i2c_get_bus_num:
739 *
740 * Returns index of currently active I2C bus. Zero-based.
741 */
742 unsigned int i2c_get_bus_num(void);
743
744 /*
745 * i2c_set_bus_num:
746 *
747 * Change the active I2C bus. Subsequent read/write calls will
748 * go to this one.
749 *
750 * bus - bus index, zero based
751 *
752 * Returns: 0 on success, not 0 on failure
753 *
754 */
755 int i2c_set_bus_num(unsigned int bus);
756
757 /*
758 * i2c_init_all():
759 *
760 * Initializes all I2C adapters in the system. All i2c_adap structures must
761 * be initialized beforehead with function pointers and data, including
762 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
763 */
764 void i2c_init_all(void);
765
766 /*
767 * Probe the given I2C chip address. Returns 0 if a chip responded,
768 * not 0 on failure.
769 */
770 int i2c_probe(uint8_t chip);
771
772 /*
773 * Read/Write interface:
774 * chip: I2C chip address, range 0..127
775 * addr: Memory (register) address within the chip
776 * alen: Number of bytes to use for addr (typically 1, 2 for larger
777 * memories, 0 for register type devices with only one
778 * register)
779 * buffer: Where to read/write the data
780 * len: How many bytes to read/write
781 *
782 * Returns: 0 on success, not 0 on failure
783 */
784 int i2c_read(uint8_t chip, unsigned int addr, int alen,
785 uint8_t *buffer, int len);
786
787 int i2c_write(uint8_t chip, unsigned int addr, int alen,
788 uint8_t *buffer, int len);
789
790 /*
791 * Utility routines to read/write registers.
792 */
793 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
794
795 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
796
797 /*
798 * i2c_set_bus_speed:
799 *
800 * Change the speed of the active I2C bus
801 *
802 * speed - bus speed in Hz
803 *
804 * Returns: new bus speed
805 *
806 */
807 unsigned int i2c_set_bus_speed(unsigned int speed);
808
809 /*
810 * i2c_get_bus_speed:
811 *
812 * Returns speed of currently active I2C bus in Hz
813 */
814
815 unsigned int i2c_get_bus_speed(void);
816
817 #else
818
819 /*
820 * Probe the given I2C chip address. Returns 0 if a chip responded,
821 * not 0 on failure.
822 */
823 int i2c_probe(uchar chip);
824
825 /*
826 * Read/Write interface:
827 * chip: I2C chip address, range 0..127
828 * addr: Memory (register) address within the chip
829 * alen: Number of bytes to use for addr (typically 1, 2 for larger
830 * memories, 0 for register type devices with only one
831 * register)
832 * buffer: Where to read/write the data
833 * len: How many bytes to read/write
834 *
835 * Returns: 0 on success, not 0 on failure
836 */
837 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
838 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
839
840 /*
841 * Utility routines to read/write registers.
842 */
i2c_reg_read(u8 addr,u8 reg)843 static inline u8 i2c_reg_read(u8 addr, u8 reg)
844 {
845 u8 buf;
846
847 #ifdef DEBUG
848 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
849 #endif
850
851 i2c_read(addr, reg, 1, &buf, 1);
852
853 return buf;
854 }
855
i2c_reg_write(u8 addr,u8 reg,u8 val)856 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
857 {
858 #ifdef DEBUG
859 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
860 __func__, addr, reg, val);
861 #endif
862
863 i2c_write(addr, reg, 1, &val, 1);
864 }
865
866 /*
867 * Functions for setting the current I2C bus and its speed
868 */
869
870 /*
871 * i2c_set_bus_num:
872 *
873 * Change the active I2C bus. Subsequent read/write calls will
874 * go to this one.
875 *
876 * bus - bus index, zero based
877 *
878 * Returns: 0 on success, not 0 on failure
879 *
880 */
881 int i2c_set_bus_num(unsigned int bus);
882
883 /*
884 * i2c_get_bus_num:
885 *
886 * Returns index of currently active I2C bus. Zero-based.
887 */
888
889 unsigned int i2c_get_bus_num(void);
890
891 /*
892 * i2c_set_bus_speed:
893 *
894 * Change the speed of the active I2C bus
895 *
896 * speed - bus speed in Hz
897 *
898 * Returns: 0 on success, not 0 on failure
899 *
900 */
901 int i2c_set_bus_speed(unsigned int);
902
903 /*
904 * i2c_get_bus_speed:
905 *
906 * Returns speed of currently active I2C bus in Hz
907 */
908
909 unsigned int i2c_get_bus_speed(void);
910 #endif /* CONFIG_SYS_I2C */
911
912 /*
913 * only for backwardcompatibility, should go away if we switched
914 * completely to new multibus support.
915 */
916 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
917 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
918 # define CONFIG_SYS_MAX_I2C_BUS 2
919 # endif
920 # define I2C_MULTI_BUS 1
921 #else
922 # define CONFIG_SYS_MAX_I2C_BUS 1
923 # define I2C_MULTI_BUS 0
924 #endif
925
926 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
927 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
I2C_GET_BUS(void)928 static inline unsigned int I2C_GET_BUS(void)
929 {
930 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
931 }
932
933 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
I2C_SET_BUS(unsigned int bus)934 static inline void I2C_SET_BUS(unsigned int bus)
935 {
936 if (I2C_MULTI_BUS)
937 i2c_set_bus_num(bus);
938 }
939
940 /* Multi I2C definitions */
941 enum {
942 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
943 I2C_8, I2C_9, I2C_10,
944 };
945
946 /**
947 * Get FDT values for i2c bus.
948 *
949 * @param blob Device tree blbo
950 * @return the number of I2C bus
951 */
952 void board_i2c_init(const void *blob);
953
954 /**
955 * Find the I2C bus number by given a FDT I2C node.
956 *
957 * @param blob Device tree blbo
958 * @param node FDT I2C node to find
959 * @return the number of I2C bus (zero based), or -1 on error
960 */
961 int i2c_get_bus_num_fdt(int node);
962
963 /**
964 * Reset the I2C bus represented by the given a FDT I2C node.
965 *
966 * @param blob Device tree blbo
967 * @param node FDT I2C node to find
968 * @return 0 if port was reset, -1 if not found
969 */
970 int i2c_reset_port_fdt(const void *blob, int node);
971
972 #endif /* !CONFIG_DM_I2C */
973
974 #endif /* _I2C_H_ */
975