1 #ifndef __ASM_X86_MTRR_H__
2 #define __ASM_X86_MTRR_H__
3
4 #include <xen/mm.h>
5
6 /* These are the region types. They match the architectural specification. */
7 #define MTRR_TYPE_UNCACHABLE 0
8 #define MTRR_TYPE_WRCOMB 1
9 #define MTRR_TYPE_WRTHROUGH 4
10 #define MTRR_TYPE_WRPROT 5
11 #define MTRR_TYPE_WRBACK 6
12 #define MTRR_NUM_TYPES 7
13 #define MEMORY_NUM_TYPES MTRR_NUM_TYPES
14 #define NO_HARDCODE_MEM_TYPE MTRR_NUM_TYPES
15
16 #define NORMAL_CACHE_MODE 0
17 #define NO_FILL_CACHE_MODE 2
18
19 enum {
20 PAT_TYPE_UNCACHABLE=0,
21 PAT_TYPE_WRCOMB=1,
22 PAT_TYPE_WRTHROUGH=4,
23 PAT_TYPE_WRPROT=5,
24 PAT_TYPE_WRBACK=6,
25 PAT_TYPE_UC_MINUS=7,
26 PAT_TYPE_NUMS
27 };
28
29 #define INVALID_MEM_TYPE PAT_TYPE_NUMS
30
31 /* In the Intel processor's MTRR interface, the MTRR type is always held in
32 an 8 bit field: */
33 typedef u8 mtrr_type;
34
35 #define MTRR_PHYSMASK_VALID_BIT 11
36 #define MTRR_PHYSMASK_VALID (1 << MTRR_PHYSMASK_VALID_BIT)
37 #define MTRR_PHYSMASK_SHIFT 12
38 #define MTRR_PHYSBASE_TYPE_MASK 0xff
39 #define MTRR_PHYSBASE_SHIFT 12
40 /* Number of variable range MSR pairs we emulate for HVM guests: */
41 #define MTRR_VCNT 8
42 /* Maximum number of variable range MSR pairs if FE is supported. */
43 #define MTRR_VCNT_MAX ((MSR_MTRRfix64K_00000 - \
44 MSR_IA32_MTRR_PHYSBASE(0)) / 2)
45
46 struct mtrr_var_range {
47 uint64_t base;
48 uint64_t mask;
49 };
50
51 #define NUM_FIXED_RANGES 88
52 #define NUM_FIXED_MSR 11
53 struct mtrr_state {
54 struct mtrr_var_range *var_ranges;
55 mtrr_type fixed_ranges[NUM_FIXED_RANGES];
56 bool enabled;
57 bool fixed_enabled;
58 bool have_fixed;
59 mtrr_type def_type;
60
61 u64 mtrr_cap;
62 /* ranges in var MSRs are overlapped or not:0(no overlapped) */
63 bool_t overlapped;
64 };
65 extern struct mtrr_state mtrr_state;
66
67 extern void mtrr_save_fixed_ranges(void *);
68 extern void mtrr_save_state(void);
69 extern int mtrr_add(unsigned long base, unsigned long size,
70 unsigned int type, char increment);
71 extern int mtrr_add_page(unsigned long base, unsigned long size,
72 unsigned int type, char increment);
73 extern int mtrr_del(int reg, unsigned long base, unsigned long size);
74 extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
75 extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
76 extern u32 get_pat_flags(struct vcpu *v, u32 gl1e_flags, paddr_t gpaddr,
77 paddr_t spaddr, uint8_t gmtrr_mtype);
78 extern int epte_get_entry_emt(struct domain *, unsigned long gfn, mfn_t mfn,
79 unsigned int order, uint8_t *ipat,
80 bool_t direct_mmio);
81 extern void ept_change_entry_emt_with_range(
82 struct domain *d, unsigned long start_gfn, unsigned long end_gfn);
83 extern unsigned char pat_type_2_pte_flags(unsigned char pat_type);
84 extern int hold_mtrr_updates_on_aps;
85 extern void mtrr_aps_sync_begin(void);
86 extern void mtrr_aps_sync_end(void);
87 extern void mtrr_bp_restore(void);
88
89 extern bool_t mtrr_var_range_msr_set(struct domain *, struct mtrr_state *,
90 uint32_t msr, uint64_t msr_content);
91 extern bool_t mtrr_fix_range_msr_set(struct domain *, struct mtrr_state *,
92 uint32_t row, uint64_t msr_content);
93 extern bool_t mtrr_def_type_msr_set(struct domain *, struct mtrr_state *,
94 uint64_t msr_content);
95 #ifdef CONFIG_HVM
96 extern void memory_type_changed(struct domain *);
97 #else
memory_type_changed(struct domain * d)98 static inline void memory_type_changed(struct domain *d) {}
99 #endif
100
101 extern bool_t pat_msr_set(uint64_t *pat, uint64_t msr);
102
103 bool is_var_mtrr_overlapped(const struct mtrr_state *m);
104 bool mtrr_pat_not_equal(const struct vcpu *vd, const struct vcpu *vs);
105
106 #endif /* __ASM_X86_MTRR_H__ */
107