1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020 Marvell International Ltd.
4  */
5 
6 #ifndef __OCTEON_MODEL_H__
7 #define __OCTEON_MODEL_H__
8 
9 /*
10  * NOTE: These must match what is checked in common-config.mk
11  * Defines to represent the different versions of Octeon.
12  *
13  * IMPORTANT: When the default pass is updated for an Octeon Model,
14  * the corresponding change must also be made in the oct-sim script.
15  *
16  * The defines below should be used with the OCTEON_IS_MODEL() macro to
17  * determine what model of chip the software is running on.  Models ending
18  * in 'XX' match multiple models (families), while specific models match only
19  * that model.  If a pass (revision) is specified, then only that revision
20  * will be matched.  Care should be taken when checking for both specific
21  * models and families that the specific models are checked for first.
22  * While these defines are similar to the processor ID, they are not intended
23  * to be used by anything other that the OCTEON_IS_MODEL framework, and
24  * the values are subject to change at anytime without notice.
25  *
26  * NOTE: only the OCTEON_IS_MODEL() macro/function and the OCTEON_CN* macros
27  * should be used outside of this file.  All other macros are for internal
28  * use only, and may change without notice.
29  */
30 
31 #define OCTEON_FAMILY_MASK      0x00ffff00
32 #define OCTEON_PRID_MASK	0x00ffffff
33 
34 /* Flag bits in top byte */
35 /* Ignores revision in model checks */
36 #define OM_IGNORE_REVISION        0x01000000
37 /* Check submodels */
38 #define OM_CHECK_SUBMODEL         0x02000000
39 /* Match all models previous than the one specified */
40 #define OM_MATCH_PREVIOUS_MODELS  0x04000000
41 /* Ignores the minor revison on newer parts */
42 #define OM_IGNORE_MINOR_REVISION  0x08000000
43 #define OM_FLAG_MASK              0xff000000
44 
45 /* Match all cn5XXX Octeon models. */
46 #define OM_MATCH_5XXX_FAMILY_MODELS     0x20000000
47 /* Match all cn6XXX Octeon models. */
48 #define OM_MATCH_6XXX_FAMILY_MODELS     0x40000000
49 /* Match all cnf7XXX Octeon models. */
50 #define OM_MATCH_F7XXX_FAMILY_MODELS    0x80000000
51 /* Match all cn7XXX Octeon models. */
52 #define OM_MATCH_7XXX_FAMILY_MODELS     0x10000000
53 #define OM_MATCH_FAMILY_MODELS		(OM_MATCH_5XXX_FAMILY_MODELS | \
54 					 OM_MATCH_6XXX_FAMILY_MODELS |	\
55 					 OM_MATCH_F7XXX_FAMILY_MODELS | \
56 					 OM_MATCH_7XXX_FAMILY_MODELS)
57 
58 /*
59  * CN7XXX models with new revision encoding
60  */
61 
62 #define OCTEON_CNF75XX_PASS1_0  0x000d9800
63 #define OCTEON_CNF75XX_PASS1_2  0x000d9802
64 #define OCTEON_CNF75XX_PASS1_3  0x000d9803
65 #define OCTEON_CNF75XX          (OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_REVISION)
66 #define OCTEON_CNF75XX_PASS1_X					\
67 	(OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
68 
69 #define OCTEON_CN73XX_PASS1_0   0x000d9700
70 #define OCTEON_CN73XX_PASS1_1   0x000d9701
71 #define OCTEON_CN73XX_PASS1_2   0x000d9702
72 #define OCTEON_CN73XX_PASS1_3   0x000d9703
73 #define OCTEON_CN73XX           (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION)
74 #define OCTEON_CN73XX_PASS1_X					\
75 	(OCTEON_CN73XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
76 
77 #define OCTEON_CN72XX		OCTEON_CN73XX
78 
79 #define OCTEON_CN23XX		OCTEON_CN73XX
80 #define OCTEON_CN23XX_PASS1_2	OCTEON_CN73XX_PASS1_2
81 #define OCTEON_CN23XX_PASS1_3	OCTEON_CN73XX_PASS1_3
82 
83 #define OCTEON_CN70XX_PASS1_0   0x000d9600
84 #define OCTEON_CN70XX_PASS1_1   0x000d9601
85 #define OCTEON_CN70XX_PASS1_2   0x000d9602
86 
87 #define OCTEON_CN70XX_PASS2_0   0x000d9608
88 
89 #define OCTEON_CN70XX           (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION)
90 #define OCTEON_CN70XX_PASS1_X					\
91 	(OCTEON_CN70XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
92 #define OCTEON_CN70XX_PASS2_X					\
93 	(OCTEON_CN70XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
94 
95 #define OCTEON_CN71XX		OCTEON_CN70XX
96 
97 #define OCTEON_CN78XX_PASS1_0   0x000d9500
98 #define OCTEON_CN78XX_PASS1_1   0x000d9501
99 #define OCTEON_CN78XX_PASS2_0   0x000d9508
100 
101 #define OCTEON_CN78XX           (OCTEON_CN78XX_PASS2_0 | OM_IGNORE_REVISION)
102 #define OCTEON_CN78XX_PASS1_X					\
103 	(OCTEON_CN78XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
104 #define OCTEON_CN78XX_PASS2_X					\
105 	(OCTEON_CN78XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
106 
107 #define OCTEON_CN76XX		  (0x000d9540 | OM_CHECK_SUBMODEL)
108 
109 /*
110  * CNF7XXX models with new revision encoding
111  */
112 #define OCTEON_CNF71XX_PASS1_0  0x000d9400
113 #define OCTEON_CNF71XX_PASS1_1  0x000d9401
114 
115 #define OCTEON_CNF71XX          (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_REVISION)
116 #define OCTEON_CNF71XX_PASS1_X					\
117 	(OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
118 
119 /*
120  * CN6XXX models with new revision encoding
121  */
122 #define OCTEON_CN68XX_PASS1_0   0x000d9100
123 #define OCTEON_CN68XX_PASS1_1   0x000d9101
124 #define OCTEON_CN68XX_PASS2_0   0x000d9108
125 #define OCTEON_CN68XX_PASS2_1   0x000d9109
126 #define OCTEON_CN68XX_PASS2_2   0x000d910a
127 
128 #define OCTEON_CN68XX           (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION)
129 #define OCTEON_CN68XX_PASS1_X					\
130 	(OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
131 #define OCTEON_CN68XX_PASS2_X					\
132 	(OCTEON_CN68XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
133 
134 #define OCTEON_CN68XX_PASS1	OCTEON_CN68XX_PASS1_X
135 #define OCTEON_CN68XX_PASS2	OCTEON_CN68XX_PASS2_X
136 
137 #define OCTEON_CN66XX_PASS1_0   0x000d9200
138 #define OCTEON_CN66XX_PASS1_2   0x000d9202
139 
140 #define OCTEON_CN66XX           (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_REVISION)
141 #define OCTEON_CN66XX_PASS1_X					\
142 	(OCTEON_CN66XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
143 
144 #define OCTEON_CN63XX_PASS1_0   0x000d9000
145 #define OCTEON_CN63XX_PASS1_1   0x000d9001
146 #define OCTEON_CN63XX_PASS1_2   0x000d9002
147 #define OCTEON_CN63XX_PASS2_0   0x000d9008
148 #define OCTEON_CN63XX_PASS2_1   0x000d9009
149 #define OCTEON_CN63XX_PASS2_2   0x000d900a
150 
151 #define OCTEON_CN63XX           (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_REVISION)
152 #define OCTEON_CN63XX_PASS1_X					\
153 	(OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
154 #define OCTEON_CN63XX_PASS2_X					\
155 	(OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
156 
157 /* CN62XX is same as CN63XX with 1 MB cache */
158 #define OCTEON_CN62XX           OCTEON_CN63XX
159 
160 #define OCTEON_CN61XX_PASS1_0   0x000d9300
161 #define OCTEON_CN61XX_PASS1_1   0x000d9301
162 
163 #define OCTEON_CN61XX           (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION)
164 #define OCTEON_CN61XX_PASS1_X					\
165 	(OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
166 
167 /* CN60XX is same as CN61XX with 512 KB cache */
168 #define OCTEON_CN60XX           OCTEON_CN61XX
169 
170 /* This matches the complete family of CN3xxx CPUs, and not subsequent models */
171 #define OCTEON_CN6XXX						\
172 	(OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
173 #define OCTEON_CNF7XXX						\
174 	(OCTEON_CNF71XX_PASS1_0 | OM_MATCH_F7XXX_FAMILY_MODELS)
175 #define OCTEON_CN7XXX						\
176 	(OCTEON_CN78XX_PASS1_0 | OM_MATCH_7XXX_FAMILY_MODELS)
177 
178 /*
179  * The revision byte (low byte) has two different encodings.
180  * CN3XXX:
181  *
182  *     bits
183  *     <7:5>: reserved (0)
184  *     <4>:   alternate package
185  *     <3:0>: revision
186  *
187  * CN5XXX and older models:
188  *
189  *     bits
190  *     <7>:   reserved (0)
191  *     <6>:   alternate package
192  *     <5:3>: major revision
193  *     <2:0>: minor revision
194  */
195 
196 /* Masks used for the various types of model/family/revision matching */
197 #define OCTEON_38XX_FAMILY_MASK      0x00ffff00
198 #define OCTEON_38XX_FAMILY_REV_MASK  0x00ffff0f
199 #define OCTEON_38XX_MODEL_MASK       0x00ffff10
200 #define OCTEON_38XX_MODEL_REV_MASK				\
201 	(OCTEON_38XX_FAMILY_REV_MASK | OCTEON_38XX_MODEL_MASK)
202 
203 /* CN5XXX and later use different layout of bits in the revision ID field */
204 #define OCTEON_58XX_FAMILY_MASK      OCTEON_38XX_FAMILY_MASK
205 #define OCTEON_58XX_FAMILY_REV_MASK  0x00ffff3f
206 #define OCTEON_58XX_MODEL_MASK       0x00ffff40
207 #define OCTEON_58XX_MODEL_REV_MASK				\
208 	(OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK)
209 #define OCTEON_58XX_MODEL_MINOR_REV_MASK		\
210 	(OCTEON_58XX_MODEL_REV_MASK & 0x00ffff38)
211 #define OCTEON_5XXX_MODEL_MASK       0x00ff0fc0
212 
213 #define __OCTEON_MATCH_MASK__(X, Y, Z)		     \
214 	({					     \
215 		typeof(X) x = (X);		     \
216 		typeof(Y) y = (Y);		     \
217 		typeof(Z) z = (Z);		     \
218 		(x & z) == (y & z);		     \
219 	 })
220 
221 /*
222  * __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model)
223  * returns true if chip_model is identical or belong to the OCTEON
224  * model group specified in arg_model.
225  */
226 
227 /* Helper macros to make to following macro compacter */
228 #define OM_MASK			OM_FLAG_MASK
229 #define OM_MATCH_MASK		__OCTEON_MATCH_MASK__
230 #define OM_MATCH_PREVIOUS	OM_MATCH_PREVIOUS_MODELS
231 
232 #define __OCTEON_IS_MODEL_COMPILE__(A, B)				\
233 	({								\
234 	typeof(A) a = (A);						\
235 	typeof(B) b = (B);						\
236 	(((((((a) & OM_MASK) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) && \
237 	    OM_MATCH_MASK((b), (a), OCTEON_58XX_MODEL_MASK)) ||		\
238 	   ((((a) & OM_MASK) == 0) &&					\
239 	    OM_MATCH_MASK((b), (a), OCTEON_58XX_FAMILY_REV_MASK)) ||	\
240 	   ((((a) & OM_MASK) == OM_IGNORE_MINOR_REVISION) &&		\
241 	    OM_MATCH_MASK((b), (a), OCTEON_58XX_MODEL_MINOR_REV_MASK)) || \
242 	   ((((a) & OM_MASK) == OM_CHECK_SUBMODEL) &&			\
243 	    OM_MATCH_MASK((b), (a), OCTEON_58XX_MODEL_MASK)) ||		\
244 	   ((((a) & OM_MASK) == OM_IGNORE_REVISION) &&			\
245 	    OM_MATCH_MASK((b), (a), OCTEON_58XX_FAMILY_MASK)) ||	\
246 	   ((((a) & (OM_MATCH_5XXX_FAMILY_MODELS)) ==			\
247 	     OM_MATCH_5XXX_FAMILY_MODELS) &&				\
248 	    ((b & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) ||	\
249 	   ((((a) & (OM_MATCH_6XXX_FAMILY_MODELS)) ==			\
250 	     OM_MATCH_6XXX_FAMILY_MODELS) &&				\
251 	    ((b & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) &&	\
252 	    ((b & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) ||	\
253 	   ((((a) & (OM_MATCH_F7XXX_FAMILY_MODELS)) ==			\
254 	     OM_MATCH_F7XXX_FAMILY_MODELS) &&				\
255 	    ((b & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) &&	\
256 	    ((b & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) ||	\
257 	   ((((a) & (OM_MATCH_7XXX_FAMILY_MODELS)) ==			\
258 	     OM_MATCH_7XXX_FAMILY_MODELS) && ((b & OCTEON_PRID_MASK) >=	\
259 					      OCTEON_CN78XX_PASS1_0)) || \
260 	   ((((a) & (OM_MATCH_PREVIOUS)) == OM_MATCH_PREVIOUS) &&	\
261 	    (((b) & OCTEON_58XX_MODEL_MASK) < ((a) & OCTEON_58XX_MODEL_MASK))) \
262 		  )));							\
263 	})
264 
265 #ifndef __ASSEMBLY__
266 
267 #ifndef OCTEON_IS_MODEL
268 
__octeon_is_model_runtime_internal__(u32 model)269 static inline int __octeon_is_model_runtime_internal__(u32 model)
270 {
271 	u32 cpuid = read_c0_prid();
272 
273 	return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
274 }
275 
__octeon_is_model_runtime__(u32 model)276 static inline int __octeon_is_model_runtime__(u32 model)
277 {
278 	return __octeon_is_model_runtime_internal__(model);
279 }
280 
281 /*
282  * The OCTEON_IS_MODEL macro should be used for all Octeon model checking done
283  * in a program.
284  * This should be kept runtime if at all possible  and must be conditionalized
285  * with OCTEON_IS_COMMON_BINARY() if runtime checking support is required.
286  *
287  * Use of the macro in preprocessor directives ( #if OCTEON_IS_MODEL(...) )
288  * is NOT SUPPORTED, and should be replaced with CVMX_COMPILED_FOR()
289  * I.e.:
290  * #if OCTEON_IS_MODEL(OCTEON_CN56XX)  ->  #if CVMX_COMPILED_FOR(OCTEON_CN56XX)
291  */
292 #define OCTEON_IS_MODEL(x)	__octeon_is_model_runtime__(x)
293 #define OCTEON_IS_COMMON_BINARY() 1
294 #undef OCTEON_MODEL
295 #endif
296 
297 #define OCTEON_IS_OCTEON2()						\
298 	(OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))
299 
300 #define OCTEON_IS_OCTEON3()	OCTEON_IS_MODEL(OCTEON_CN7XXX)
301 
302 const char *octeon_model_get_string(u32 chip_id);
303 const char *octeon_model_get_string_buffer(u32 chip_id, char *buffer);
304 
305 /**
306  * Return the octeon family, i.e., ProcessorID of the PrID register.
307  *
308  * @return the octeon family on success, ((u32)-1) on error.
309  */
cvmx_get_octeon_family(void)310 static inline u32 cvmx_get_octeon_family(void)
311 {
312 	return (read_c0_prid() & OCTEON_FAMILY_MASK);
313 }
314 
315 #endif /* __ASSEMBLY__ */
316 
317 #endif /* __OCTEON_MODEL_H__ */
318