1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2016, Linaro Ltd and Contributors. All rights reserved. 4 * Copyright (c) 2016, Hisilicon Ltd and Contributors. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * Redistributions of source code must retain the above copyright notice, this 10 * list of conditions and the following disclaimer. 11 * 12 * Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * Neither the name of ARM nor the names of its contributors may be used 17 * to endorse or promote products derived from this software without specific 18 * prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef __HIKEY_PERIPHERALS_H__ 34 #define __HIKEY_PERIPHERALS_H__ 35 36 #include <types_ext.h> 37 38 #define PMUSSI_BASE 0xF8000000 39 #define PERI_BASE 0xF7030000 40 #define PMX0_BASE 0xF7010000 41 #define PMX1_BASE 0xF7010800 42 #define GPIO6_BASE 0xF7022000 43 #define SPI_BASE 0xF7106000 44 45 #define PMUSSI_REG_SIZE 0x1000 46 #define PERI_BASE_REG_SIZE 0x2000 47 #define PMX0_REG_SIZE 0x27c 48 #define PMX1_REG_SIZE 0x28c 49 50 /* register offsets */ 51 #define PMUSSI_LDO21_REG_ADJ SHIFT_U32(0x86, 2) 52 #define PMUSSI_ENA_LDO17_22 SHIFT_U32(0x2F, 2) 53 54 #define PERI_SC_PERIPH_RSTDIS3 0x334 55 #define PERI_SC_PERIPH_RSTSTAT3 0x338 56 #define PERI_SC_PERIPH_CLKEN3 0x230 57 #define PERI_SC_PERIPH_CLKSTAT3 0x238 58 59 #define PMX0_IOMG104 0x1a0 60 #define PMX0_IOMG105 0x1a4 61 #define PMX0_IOMG106 0x1a8 62 #define PMX0_IOMG107 0x1ac 63 64 #define PMX1_IOCG104 0x1b0 65 #define PMX1_IOCG105 0x1b4 66 #define PMX1_IOCG106 0x1b8 67 #define PMX1_IOCG107 0x1bc 68 /* end register offsets */ 69 70 #define PMUSSI_LDO21_REG_VL_MASK 0x7 71 #define PMUSSI_LDO21_REG_VL_1V8 0x3 72 #define PMUSSI_ENA_LDO21 BIT(4) 73 74 #define PERI_RST3_SSP BIT(9) 75 #define PERI_CLK3_SSP BIT(9) 76 77 #define PINMUX_GPIO 0 78 #define PINMUX_SPI 1 79 80 #define PINCFG_NOPULL 0 81 #define PINCFG_PULLUP 1 82 #define PINCFG_PULLDN 2 83 84 #define GPIO6_2 50 85 #define SPI_CLK_HZ 150000000 /* 150mhz */ 86 #define SPI_500_KHZ 500000 87 #define SPI_10_KHZ 10000 88 89 #ifdef CFG_SPI 90 void spi_init(void); 91 #ifdef CFG_SPI_TEST 92 void spi_test(void); 93 #endif /* CFG_SPI_TEST */ 94 #endif /* CFG_SPI */ 95 96 #endif /* __HIKEY_PERIPHERALS_H__ */ 97