1 /*
2  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3  * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef PMC_H
9 #define PMC_H
10 
11 #include <lib/mmio.h>
12 #include <lib/utils_def.h>
13 #include <stdbool.h>
14 
15 #include <tegra_def.h>
16 
17 #define PMC_CONFIG				U(0x0)
18 #define PMC_IO_DPD_SAMPLE			U(0x20)
19 #define PMC_DPD_ENABLE_0			U(0x24)
20 #define PMC_PWRGATE_STATUS			U(0x38)
21 #define PMC_PWRGATE_TOGGLE			U(0x30)
22 #define PMC_SCRATCH1				U(0x54)
23 #define PMC_CRYPTO_OP_0				U(0xf4)
24 #define  PMC_TOGGLE_START			U(0x100)
25 #define PMC_SCRATCH31				U(0x118)
26 #define PMC_SCRATCH32				U(0x11C)
27 #define PMC_SCRATCH33				U(0x120)
28 #define PMC_SCRATCH39				U(0x138)
29 #define PMC_SCRATCH40				U(0x13C)
30 #define PMC_SCRATCH41 				U(0x140)
31 #define PMC_SCRATCH42				U(0x144)
32 #define PMC_SCRATCH43				U(0x22C)
33 #define PMC_SCRATCH44				U(0x230)
34 #define PMC_SCRATCH45				U(0x234)
35 #define PMC_SCRATCH46				U(0x238)
36 #define PMC_SCRATCH47				U(0x23C)
37 #define PMC_SCRATCH48				U(0x240)
38 #define PMC_SCRATCH50				U(0x248)
39 #define PMC_SCRATCH51				U(0x24C)
40 #define PMC_TSC_MULT_0				U(0x2B4)
41 #define PMC_STICKY_BIT				U(0x2C0)
42 #define PMC_SECURE_DISABLE2			U(0x2C4)
43 #define  PMC_SECURE_DISABLE2_WRITE22_ON		(U(1) << 28)
44 #define PMC_FUSE_CONTROL_0			U(0x450)
45 #define PMC_SECURE_DISABLE3			U(0x2D8)
46 #define  PMC_SECURE_DISABLE3_WRITE34_ON		(U(1) << 20)
47 #define  PMC_SECURE_DISABLE3_WRITE35_ON		(U(1) << 22)
48 #define PMC_SECURE_SCRATCH22			U(0x338)
49 #define PMC_SECURE_SCRATCH34			U(0x368)
50 #define PMC_SECURE_SCRATCH35			U(0x36c)
51 #define PMC_SCRATCH56				U(0x600)
52 #define PMC_SCRATCH57				U(0x604)
53 #define PMC_SCRATCH201				U(0x844)
54 
tegra_pmc_read_32(uint32_t off)55 static inline uint32_t tegra_pmc_read_32(uint32_t off)
56 {
57 	return mmio_read_32(TEGRA_PMC_BASE + off);
58 }
59 
tegra_pmc_write_32(uint32_t off,uint32_t val)60 static inline void tegra_pmc_write_32(uint32_t off, uint32_t val)
61 {
62 	mmio_write_32(TEGRA_PMC_BASE + off, val);
63 }
64 
65 void tegra_pmc_cpu_on(int32_t cpu);
66 void tegra_pmc_cpu_setup(uint64_t reset_addr);
67 bool tegra_pmc_is_last_on_cpu(void);
68 void tegra_pmc_lock_cpu_vectors(void);
69 void tegra_pmc_resume(void);
70 __dead2 void tegra_pmc_system_reset(void);
71 
72 #endif /* PMC_H */
73