1 /* 2 * Texas Instruments System Control Interface (TISCI) Protocol 3 * 4 * Communication protocol with TI SCI hardware 5 * The system works in a message response protocol 6 * See: http://processors.wiki.ti.com/index.php/TISCI for details 7 * 8 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ 9 * 10 * SPDX-License-Identifier: BSD-3-Clause 11 */ 12 13 #ifndef TI_SCI_PROTOCOL_H 14 #define TI_SCI_PROTOCOL_H 15 16 #include <stdint.h> 17 18 /* Generic Messages */ 19 #define TI_SCI_MSG_ENABLE_WDT 0x0000 20 #define TI_SCI_MSG_WAKE_RESET 0x0001 21 #define TI_SCI_MSG_VERSION 0x0002 22 #define TI_SCI_MSG_WAKE_REASON 0x0003 23 #define TI_SCI_MSG_GOODBYE 0x0004 24 #define TI_SCI_MSG_SYS_RESET 0x0005 25 26 /* Device requests */ 27 #define TI_SCI_MSG_SET_DEVICE_STATE 0x0200 28 #define TI_SCI_MSG_GET_DEVICE_STATE 0x0201 29 #define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202 30 31 /* Clock requests */ 32 #define TI_SCI_MSG_SET_CLOCK_STATE 0x0100 33 #define TI_SCI_MSG_GET_CLOCK_STATE 0x0101 34 #define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102 35 #define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103 36 #define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104 37 #define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c 38 #define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d 39 #define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e 40 41 /* Processor Control Messages */ 42 #define TISCI_MSG_PROC_REQUEST 0xc000 43 #define TISCI_MSG_PROC_RELEASE 0xc001 44 #define TISCI_MSG_PROC_HANDOVER 0xc005 45 #define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100 46 #define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101 47 #define TISCI_MSG_PROC_AUTH_BOOT_IMIAGE 0xc120 48 #define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400 49 #define TISCI_MSG_WAIT_PROC_BOOT_STATUS 0xc401 50 51 /** 52 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses 53 * @type: Type of messages: One of TI_SCI_MSG* values 54 * @host: Host of the message 55 * @seq: Message identifier indicating a transfer sequence 56 * @flags: Flag for the message 57 */ 58 struct ti_sci_msg_hdr { 59 uint16_t type; 60 uint8_t host; 61 uint8_t seq; 62 #define TI_SCI_MSG_FLAG(val) (1 << (val)) 63 #define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0 64 #define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0) 65 #define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1) 66 #define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0 67 #define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1) 68 /* Additional Flags */ 69 uint32_t flags; 70 } __packed; 71 72 /** 73 * struct ti_sci_msg_resp_version - Response for a message 74 * @hdr: Generic header 75 * @firmware_description: String describing the firmware 76 * @firmware_revision: Firmware revision 77 * @abi_major: Major version of the ABI that firmware supports 78 * @abi_minor: Minor version of the ABI that firmware supports 79 * 80 * In general, ABI version changes follow the rule that minor version increments 81 * are backward compatible. Major revision changes in ABI may not be 82 * backward compatible. 83 * 84 * Response to a generic message with message type TI_SCI_MSG_VERSION 85 */ 86 struct ti_sci_msg_resp_version { 87 struct ti_sci_msg_hdr hdr; 88 #define FIRMWARE_DESCRIPTION_LENGTH 32 89 char firmware_description[FIRMWARE_DESCRIPTION_LENGTH]; 90 uint16_t firmware_revision; 91 uint8_t abi_major; 92 uint8_t abi_minor; 93 } __packed; 94 95 /** 96 * struct ti_sci_msg_req_reboot - Reboot the SoC 97 * @hdr: Generic Header 98 * @domain: Domain to be reset, 0 for full SoC reboot 99 * 100 * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic 101 * ACK/NACK message. 102 */ 103 struct ti_sci_msg_req_reboot { 104 struct ti_sci_msg_hdr hdr; 105 #define TI_SCI_DOMAIN_FULL_SOC_RESET 0x0 106 uint8_t domain; 107 } __packed; 108 109 /** 110 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device 111 * @hdr: Generic header 112 * @id: Indicates which device to modify 113 * @reserved: Reserved space in message, must be 0 for backward compatibility 114 * @state: The desired state of the device. 115 * 116 * Certain flags can also be set to alter the device state: 117 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. 118 * The meaning of this flag will vary slightly from device to device and from 119 * SoC to SoC but it generally allows the device to wake the SoC out of deep 120 * suspend states. 121 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. 122 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed 123 * with STATE_RETENTION or STATE_ON, it will claim the device exclusively. 124 * If another host already has this device set to STATE_RETENTION or STATE_ON, 125 * the message will fail. Once successful, other hosts attempting to set 126 * STATE_RETENTION or STATE_ON will fail. 127 * 128 * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic 129 * ACK/NACK message. 130 */ 131 struct ti_sci_msg_req_set_device_state { 132 /* Additional hdr->flags options */ 133 #define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8) 134 #define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9) 135 #define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10) 136 struct ti_sci_msg_hdr hdr; 137 uint32_t id; 138 uint32_t reserved; 139 140 #define MSG_DEVICE_SW_STATE_AUTO_OFF 0 141 #define MSG_DEVICE_SW_STATE_RETENTION 1 142 #define MSG_DEVICE_SW_STATE_ON 2 143 uint8_t state; 144 } __packed; 145 146 /** 147 * struct ti_sci_msg_req_get_device_state - Request to get device. 148 * @hdr: Generic header 149 * @id: Device Identifier 150 * 151 * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state 152 * information 153 */ 154 struct ti_sci_msg_req_get_device_state { 155 struct ti_sci_msg_hdr hdr; 156 uint32_t id; 157 } __packed; 158 159 /** 160 * struct ti_sci_msg_resp_get_device_state - Response to get device request. 161 * @hdr: Generic header 162 * @context_loss_count: Indicates how many times the device has lost context. A 163 * driver can use this monotonic counter to determine if the device has 164 * lost context since the last time this message was exchanged. 165 * @resets: Programmed state of the reset lines. 166 * @programmed_state: The state as programmed by set_device. 167 * - Uses the MSG_DEVICE_SW_* macros 168 * @current_state: The actual state of the hardware. 169 * 170 * Response to request TI_SCI_MSG_GET_DEVICE_STATE. 171 */ 172 struct ti_sci_msg_resp_get_device_state { 173 struct ti_sci_msg_hdr hdr; 174 uint32_t context_loss_count; 175 uint32_t resets; 176 uint8_t programmed_state; 177 #define MSG_DEVICE_HW_STATE_OFF 0 178 #define MSG_DEVICE_HW_STATE_ON 1 179 #define MSG_DEVICE_HW_STATE_TRANS 2 180 uint8_t current_state; 181 } __packed; 182 183 /** 184 * struct ti_sci_msg_req_set_device_resets - Set the desired resets 185 * configuration of the device 186 * @hdr: Generic header 187 * @id: Indicates which device to modify 188 * @resets: A bit field of resets for the device. The meaning, behavior, 189 * and usage of the reset flags are device specific. 0 for a bit 190 * indicates releasing the reset represented by that bit while 1 191 * indicates keeping it held. 192 * 193 * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic 194 * ACK/NACK message. 195 */ 196 struct ti_sci_msg_req_set_device_resets { 197 struct ti_sci_msg_hdr hdr; 198 uint32_t id; 199 uint32_t resets; 200 } __packed; 201 202 /** 203 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state 204 * @hdr: Generic Header, Certain flags can be set specific to the clocks: 205 * MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified 206 * via spread spectrum clocking. 207 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's 208 * frequency to be changed while it is running so long as it 209 * is within the min/max limits. 210 * MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this 211 * is only applicable to clock inputs on the SoC pseudo-device. 212 * @dev_id: Device identifier this request is for 213 * @clk_id: Clock identifier for the device for this request. 214 * Each device has it's own set of clock inputs. This indexes 215 * which clock input to modify. 216 * @request_state: Request the state for the clock to be set to. 217 * MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock, 218 * it can be disabled, regardless of the state of the device 219 * MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to 220 * automatically manage the state of this clock. If the device 221 * is enabled, then the clock is enabled. If the device is set 222 * to off or retention, then the clock is internally set as not 223 * being required by the device.(default) 224 * MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled, 225 * regardless of the state of the device. 226 * 227 * Normally, all required clocks are managed by TISCI entity, this is used 228 * only for specific control *IF* required. Auto managed state is 229 * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote 230 * will explicitly control. 231 * 232 * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic 233 * ACK or NACK message. 234 */ 235 struct ti_sci_msg_req_set_clock_state { 236 /* Additional hdr->flags options */ 237 #define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8) 238 #define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9) 239 #define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10) 240 struct ti_sci_msg_hdr hdr; 241 uint32_t dev_id; 242 uint8_t clk_id; 243 #define MSG_CLOCK_SW_STATE_UNREQ 0 244 #define MSG_CLOCK_SW_STATE_AUTO 1 245 #define MSG_CLOCK_SW_STATE_REQ 2 246 uint8_t request_state; 247 } __packed; 248 249 /** 250 * struct ti_sci_msg_req_get_clock_state - Request for clock state 251 * @hdr: Generic Header 252 * @dev_id: Device identifier this request is for 253 * @clk_id: Clock identifier for the device for this request. 254 * Each device has it's own set of clock inputs. This indexes 255 * which clock input to get state of. 256 * 257 * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state 258 * of the clock 259 */ 260 struct ti_sci_msg_req_get_clock_state { 261 struct ti_sci_msg_hdr hdr; 262 uint32_t dev_id; 263 uint8_t clk_id; 264 } __packed; 265 266 /** 267 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state 268 * @hdr: Generic Header 269 * @programmed_state: Any programmed state of the clock. This is one of 270 * MSG_CLOCK_SW_STATE* values. 271 * @current_state: Current state of the clock. This is one of: 272 * MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready 273 * MSG_CLOCK_HW_STATE_READY: Clock is ready 274 * 275 * Response to TI_SCI_MSG_GET_CLOCK_STATE. 276 */ 277 struct ti_sci_msg_resp_get_clock_state { 278 struct ti_sci_msg_hdr hdr; 279 uint8_t programmed_state; 280 #define MSG_CLOCK_HW_STATE_NOT_READY 0 281 #define MSG_CLOCK_HW_STATE_READY 1 282 uint8_t current_state; 283 } __packed; 284 285 /** 286 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent 287 * @hdr: Generic Header 288 * @dev_id: Device identifier this request is for 289 * @clk_id: Clock identifier for the device for this request. 290 * Each device has it's own set of clock inputs. This indexes 291 * which clock input to modify. 292 * @parent_id: The new clock parent is selectable by an index via this 293 * parameter. 294 * 295 * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic 296 * ACK / NACK message. 297 */ 298 struct ti_sci_msg_req_set_clock_parent { 299 struct ti_sci_msg_hdr hdr; 300 uint32_t dev_id; 301 uint8_t clk_id; 302 uint8_t parent_id; 303 } __packed; 304 305 /** 306 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent 307 * @hdr: Generic Header 308 * @dev_id: Device identifier this request is for 309 * @clk_id: Clock identifier for the device for this request. 310 * Each device has it's own set of clock inputs. This indexes 311 * which clock input to get the parent for. 312 * 313 * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information 314 */ 315 struct ti_sci_msg_req_get_clock_parent { 316 struct ti_sci_msg_hdr hdr; 317 uint32_t dev_id; 318 uint8_t clk_id; 319 } __packed; 320 321 /** 322 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent 323 * @hdr: Generic Header 324 * @parent_id: The current clock parent 325 * 326 * Response to TI_SCI_MSG_GET_CLOCK_PARENT. 327 */ 328 struct ti_sci_msg_resp_get_clock_parent { 329 struct ti_sci_msg_hdr hdr; 330 uint8_t parent_id; 331 } __packed; 332 333 /** 334 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents 335 * @hdr: Generic header 336 * @dev_id: Device identifier this request is for 337 * @clk_id: Clock identifier for the device for this request. 338 * 339 * This request provides information about how many clock parent options 340 * are available for a given clock to a device. This is typically used 341 * for input clocks. 342 * 343 * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate 344 * message, or NACK in case of inability to satisfy request. 345 */ 346 struct ti_sci_msg_req_get_clock_num_parents { 347 struct ti_sci_msg_hdr hdr; 348 uint32_t dev_id; 349 uint8_t clk_id; 350 } __packed; 351 352 /** 353 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents 354 * @hdr: Generic header 355 * @num_parents: Number of clock parents 356 * 357 * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 358 */ 359 struct ti_sci_msg_resp_get_clock_num_parents { 360 struct ti_sci_msg_hdr hdr; 361 uint8_t num_parents; 362 } __packed; 363 364 /** 365 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency 366 * @hdr: Generic Header 367 * @dev_id: Device identifier this request is for 368 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 369 * allowable programmed frequency and does not account for clock 370 * tolerances and jitter. 371 * @target_freq_hz: The target clock frequency. A frequency will be found 372 * as close to this target frequency as possible. 373 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 374 * allowable programmed frequency and does not account for clock 375 * tolerances and jitter. 376 * @clk_id: Clock identifier for the device for this request. 377 * 378 * NOTE: Normally clock frequency management is automatically done by TISCI 379 * entity. In case of specific requests, TISCI evaluates capability to achieve 380 * requested frequency within provided range and responds with 381 * result message. 382 * 383 * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message, 384 * or NACK in case of inability to satisfy request. 385 */ 386 struct ti_sci_msg_req_query_clock_freq { 387 struct ti_sci_msg_hdr hdr; 388 uint32_t dev_id; 389 uint64_t min_freq_hz; 390 uint64_t target_freq_hz; 391 uint64_t max_freq_hz; 392 uint8_t clk_id; 393 } __packed; 394 395 /** 396 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query 397 * @hdr: Generic Header 398 * @freq_hz: Frequency that is the best match in Hz. 399 * 400 * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request 401 * cannot be satisfied, the message will be of type NACK. 402 */ 403 struct ti_sci_msg_resp_query_clock_freq { 404 struct ti_sci_msg_hdr hdr; 405 uint64_t freq_hz; 406 } __packed; 407 408 /** 409 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency 410 * @hdr: Generic Header 411 * @dev_id: Device identifier this request is for 412 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 413 * allowable programmed frequency and does not account for clock 414 * tolerances and jitter. 415 * @target_freq_hz: The target clock frequency. The clock will be programmed 416 * at a rate as close to this target frequency as possible. 417 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 418 * allowable programmed frequency and does not account for clock 419 * tolerances and jitter. 420 * @clk_id: Clock identifier for the device for this request. 421 * 422 * NOTE: Normally clock frequency management is automatically done by TISCI 423 * entity. In case of specific requests, TISCI evaluates capability to achieve 424 * requested range and responds with success/failure message. 425 * 426 * This sets the desired frequency for a clock within an allowable 427 * range. This message will fail on an enabled clock unless 428 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, 429 * if other clocks have their frequency modified due to this message, 430 * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled. 431 * 432 * Calling set frequency on a clock input to the SoC pseudo-device will 433 * inform the PMMC of that clock's frequency. Setting a frequency of 434 * zero will indicate the clock is disabled. 435 * 436 * Calling set frequency on clock outputs from the SoC pseudo-device will 437 * function similarly to setting the clock frequency on a device. 438 * 439 * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK 440 * message. 441 */ 442 struct ti_sci_msg_req_set_clock_freq { 443 struct ti_sci_msg_hdr hdr; 444 uint32_t dev_id; 445 uint64_t min_freq_hz; 446 uint64_t target_freq_hz; 447 uint64_t max_freq_hz; 448 uint8_t clk_id; 449 } __packed; 450 451 /** 452 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency 453 * @hdr: Generic Header 454 * @dev_id: Device identifier this request is for 455 * @clk_id: Clock identifier for the device for this request. 456 * 457 * NOTE: Normally clock frequency management is automatically done by TISCI 458 * entity. In some cases, clock frequencies are configured by host. 459 * 460 * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency 461 * that the clock is currently at. 462 */ 463 struct ti_sci_msg_req_get_clock_freq { 464 struct ti_sci_msg_hdr hdr; 465 uint32_t dev_id; 466 uint8_t clk_id; 467 } __packed; 468 469 /** 470 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request 471 * @hdr: Generic Header 472 * @freq_hz: Frequency that the clock is currently on, in Hz. 473 * 474 * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ. 475 */ 476 struct ti_sci_msg_resp_get_clock_freq { 477 struct ti_sci_msg_hdr hdr; 478 uint64_t freq_hz; 479 } __packed; 480 481 #define TISCI_ADDR_LOW_MASK 0x00000000ffffffff 482 #define TISCI_ADDR_HIGH_MASK 0xffffffff00000000 483 #define TISCI_ADDR_HIGH_SHIFT 32 484 485 /** 486 * struct ti_sci_msg_req_proc_request - Request a processor 487 * 488 * @hdr: Generic Header 489 * @processor_id: ID of processor 490 * 491 * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK 492 * message. 493 */ 494 struct ti_sci_msg_req_proc_request { 495 struct ti_sci_msg_hdr hdr; 496 uint8_t processor_id; 497 } __packed; 498 499 /** 500 * struct ti_sci_msg_req_proc_release - Release a processor 501 * 502 * @hdr: Generic Header 503 * @processor_id: ID of processor 504 * 505 * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK 506 * message. 507 */ 508 struct ti_sci_msg_req_proc_release { 509 struct ti_sci_msg_hdr hdr; 510 uint8_t processor_id; 511 } __packed; 512 513 /** 514 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host 515 * 516 * @hdr: Generic Header 517 * @processor_id: ID of processor 518 * @host_id: New Host we want to give control to 519 * 520 * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK 521 * message. 522 */ 523 struct ti_sci_msg_req_proc_handover { 524 struct ti_sci_msg_hdr hdr; 525 uint8_t processor_id; 526 uint8_t host_id; 527 } __packed; 528 529 /* A53 Config Flags */ 530 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001 531 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002 532 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004 533 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008 534 #define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100 535 536 /* R5 Config Flags */ 537 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001 538 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002 539 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 540 #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200 541 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400 542 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800 543 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000 544 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000 545 546 /** 547 * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration 548 * @hdr: Generic Header 549 * @processor_id: ID of processor 550 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 551 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 552 * @config_flags_set: Optional Processor specific Config Flags to set. 553 * Setting a bit here implies required bit sets to 1. 554 * @config_flags_clear: Optional Processor specific Config Flags to clear. 555 * Setting a bit here implies required bit gets cleared. 556 * 557 * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic 558 * ACK/NACK message. 559 */ 560 struct ti_sci_msg_req_set_proc_boot_config { 561 struct ti_sci_msg_hdr hdr; 562 uint8_t processor_id; 563 uint32_t bootvector_low; 564 uint32_t bootvector_high; 565 uint32_t config_flags_set; 566 uint32_t config_flags_clear; 567 } __packed; 568 569 /* ARMV8 Control Flags */ 570 #define PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM 0x00000001 571 #define PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS 0x00000002 572 #define PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ 0x00000100 573 574 /* R5 Control Flags */ 575 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 576 577 /** 578 * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags 579 * @hdr: Generic Header 580 * @processor_id: ID of processor 581 * @config_flags_set: Optional Processor specific Config Flags to set. 582 * Setting a bit here implies required bit sets to 1. 583 * @config_flags_clear: Optional Processor specific Config Flags to clear. 584 * Setting a bit here implies required bit gets cleared. 585 * 586 * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK 587 * message. 588 */ 589 struct ti_sci_msg_req_set_proc_boot_ctrl { 590 struct ti_sci_msg_hdr hdr; 591 uint8_t processor_id; 592 uint32_t control_flags_set; 593 uint32_t control_flags_clear; 594 } __packed; 595 596 /** 597 * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image 598 * @hdr: Generic Header 599 * @processor_id: ID of processor 600 * @cert_addr_low: Lower 32bit (Little Endian) of certificate 601 * @cert_addr_high: Higher 32bit (Little Endian) of certificate 602 * 603 * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic 604 * ACK/NACK message. 605 */ 606 struct ti_sci_msg_req_proc_auth_boot_image { 607 struct ti_sci_msg_hdr hdr; 608 uint8_t processor_id; 609 uint32_t cert_addr_low; 610 uint32_t cert_addr_high; 611 } __packed; 612 613 /** 614 * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status 615 * @hdr: Generic Header 616 * @processor_id: ID of processor 617 * 618 * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate 619 * message, or NACK in case of inability to satisfy request. 620 */ 621 struct ti_sci_msg_req_get_proc_boot_status { 622 struct ti_sci_msg_hdr hdr; 623 uint8_t processor_id; 624 } __packed; 625 626 /* ARMv8 Status Flags */ 627 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001 628 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002 629 #define PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE 0x00000010 630 #define PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 0x00000020 631 632 /* R5 Status Flags */ 633 #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001 634 #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 635 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004 636 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100 637 638 /** 639 * \brief Processor Status Response 640 * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response 641 * @hdr: Generic Header 642 * @processor_id: ID of processor 643 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 644 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 645 * @config_flags: Optional Processor specific Config Flags set. 646 * @control_flags: Optional Processor specific Control Flags. 647 * @status_flags: Optional Processor specific Status Flags set. 648 * 649 * Response to TISCI_MSG_GET_PROC_BOOT_STATUS. 650 */ 651 struct ti_sci_msg_resp_get_proc_boot_status { 652 struct ti_sci_msg_hdr hdr; 653 uint8_t processor_id; 654 uint32_t bootvector_low; 655 uint32_t bootvector_high; 656 uint32_t config_flags; 657 uint32_t control_flags; 658 uint32_t status_flags; 659 } __packed; 660 661 /** 662 * struct ti_sci_msg_req_wait_proc_boot_status - Wait for a processor boot status 663 * @hdr: Generic Header 664 * @processor_id: ID of processor 665 * @num_wait_iterations Total number of iterations we will check before 666 * we will timeout and give up 667 * @num_match_iterations How many iterations should we have continued 668 * status to account for status bits glitching. 669 * This is to make sure that match occurs for 670 * consecutive checks. This implies that the 671 * worst case should consider that the stable 672 * time should at the worst be num_wait_iterations 673 * num_match_iterations to prevent timeout. 674 * @delay_per_iteration_us Specifies how long to wait (in micro seconds) 675 * between each status checks. This is the minimum 676 * duration, and overhead of register reads and 677 * checks are on top of this and can vary based on 678 * varied conditions. 679 * @delay_before_iterations_us Specifies how long to wait (in micro seconds) 680 * before the very first check in the first 681 * iteration of status check loop. This is the 682 * minimum duration, and overhead of register 683 * reads and checks are. 684 * @status_flags_1_set_all_wait If non-zero, Specifies that all bits of the 685 * status matching this field requested MUST be 1. 686 * @status_flags_1_set_any_wait If non-zero, Specifies that at least one of the 687 * bits matching this field requested MUST be 1. 688 * @status_flags_1_clr_all_wait If non-zero, Specifies that all bits of the 689 * status matching this field requested MUST be 0. 690 * @status_flags_1_clr_any_wait If non-zero, Specifies that at least one of the 691 * bits matching this field requested MUST be 0. 692 * 693 * Request type is TISCI_MSG_WAIT_PROC_BOOT_STATUS, response is appropriate 694 * message, or NACK in case of inability to satisfy request. 695 */ 696 struct ti_sci_msg_req_wait_proc_boot_status { 697 struct ti_sci_msg_hdr hdr; 698 uint8_t processor_id; 699 uint8_t num_wait_iterations; 700 uint8_t num_match_iterations; 701 uint8_t delay_per_iteration_us; 702 uint8_t delay_before_iterations_us; 703 uint32_t status_flags_1_set_all_wait; 704 uint32_t status_flags_1_set_any_wait; 705 uint32_t status_flags_1_clr_all_wait; 706 uint32_t status_flags_1_clr_any_wait; 707 } __packed; 708 709 #endif /* TI_SCI_PROTOCOL_H */ 710