1 #ifndef __ASM_PSCI_H__ 2 #define __ASM_PSCI_H__ 3 4 #include <asm/smccc.h> 5 6 /* PSCI return values (inclusive of all PSCI versions) */ 7 #define PSCI_SUCCESS 0 8 #define PSCI_NOT_SUPPORTED -1 9 #define PSCI_INVALID_PARAMETERS -2 10 #define PSCI_DENIED -3 11 #define PSCI_ALREADY_ON -4 12 #define PSCI_ON_PENDING -5 13 #define PSCI_INTERNAL_FAILURE -6 14 #define PSCI_NOT_PRESENT -7 15 #define PSCI_DISABLED -8 16 #define PSCI_INVALID_ADDRESS -9 17 18 /* availability of PSCI on the host for SMP bringup */ 19 extern uint32_t psci_ver; 20 21 int psci_init(void); 22 int call_psci_cpu_on(int cpu); 23 void call_psci_cpu_off(void); 24 void call_psci_system_off(void); 25 void call_psci_system_reset(void); 26 27 /* PSCI v0.2 interface */ 28 #define PSCI_0_2_FN32(nr) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 29 ARM_SMCCC_CONV_32, \ 30 ARM_SMCCC_OWNER_STANDARD, \ 31 nr) 32 #define PSCI_0_2_FN64(nr) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 33 ARM_SMCCC_CONV_64, \ 34 ARM_SMCCC_OWNER_STANDARD, \ 35 nr) 36 37 #define PSCI_0_2_FN32_PSCI_VERSION PSCI_0_2_FN32(0) 38 #define PSCI_0_2_FN32_CPU_SUSPEND PSCI_0_2_FN32(1) 39 #define PSCI_0_2_FN32_CPU_OFF PSCI_0_2_FN32(2) 40 #define PSCI_0_2_FN32_CPU_ON PSCI_0_2_FN32(3) 41 #define PSCI_0_2_FN32_AFFINITY_INFO PSCI_0_2_FN32(4) 42 #define PSCI_0_2_FN32_MIGRATE_INFO_TYPE PSCI_0_2_FN32(6) 43 #define PSCI_0_2_FN32_SYSTEM_OFF PSCI_0_2_FN32(8) 44 #define PSCI_0_2_FN32_SYSTEM_RESET PSCI_0_2_FN32(9) 45 #define PSCI_1_0_FN32_PSCI_FEATURES PSCI_0_2_FN32(10) 46 47 #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) 48 #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) 49 #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) 50 51 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ 52 #define PSCI_0_2_AFFINITY_LEVEL_ON 0 53 #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 54 #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 55 56 /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */ 57 #define PSCI_0_2_TOS_UP_MIGRATE_CAPABLE 0 58 #define PSCI_0_2_TOS_UP_NOT_MIGRATE_CAPABLE 1 59 #define PSCI_0_2_TOS_MP_OR_NOT_PRESENT 2 60 61 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ 62 #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff 63 #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 64 #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 65 #define PSCI_0_2_POWER_STATE_TYPE_MASK \ 66 (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) 67 68 /* PSCI version decoding (independent of PSCI version) */ 69 #define PSCI_VERSION_MAJOR_SHIFT 16 70 #define PSCI_VERSION_MINOR_MASK \ 71 ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) 72 #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK 73 #define PSCI_VERSION_MAJOR(ver) \ 74 (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) 75 #define PSCI_VERSION_MINOR(ver) \ 76 ((ver) & PSCI_VERSION_MINOR_MASK) 77 78 #define PSCI_VERSION(major, minor) \ 79 (((major) << PSCI_VERSION_MAJOR_SHIFT) | (minor)) 80 81 #endif /* __ASM_PSCI_H__ */ 82 83 /* 84 * Local variables: 85 * mode: C 86 * c-file-style: "BSD" 87 * c-basic-offset: 4 88 * tab-width: 4 89 * indent-tabs-mode: nil 90 * End: 91 */ 92