1 /* 2 * Definitions for RBTX4939 3 * 4 * (C) Copyright TOSHIBA CORPORATION 2005-2006 5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the 6 * terms of the GNU General Public License version 2. This program is 7 * licensed "as is" without any warranty of any kind, whether express 8 * or implied. 9 */ 10 #ifndef __ASM_TXX9_RBTX4939_H 11 #define __ASM_TXX9_RBTX4939_H 12 13 #include <asm/addrspace.h> 14 #include <asm/txx9irq.h> 15 #include <asm/txx9/generic.h> 16 #include <asm/txx9/tx4939.h> 17 18 /* Address map */ 19 #define RBTX4939_IOC_REG_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) 20 #define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) 21 #define RBTX4939_IOC_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000002) 22 #define RBTX4939_CONFIG1_ADDR (IO_BASE + TXX9_CE(1) + 0x00000004) 23 #define RBTX4939_CONFIG2_ADDR (IO_BASE + TXX9_CE(1) + 0x00000006) 24 #define RBTX4939_CONFIG3_ADDR (IO_BASE + TXX9_CE(1) + 0x00000008) 25 #define RBTX4939_CONFIG4_ADDR (IO_BASE + TXX9_CE(1) + 0x0000000a) 26 #define RBTX4939_USTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00001000) 27 #define RBTX4939_UDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001002) 28 #define RBTX4939_BDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001004) 29 #define RBTX4939_IEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00002000) 30 #define RBTX4939_IPOL_ADDR (IO_BASE + TXX9_CE(1) + 0x00002002) 31 #define RBTX4939_IFAC1_ADDR (IO_BASE + TXX9_CE(1) + 0x00002004) 32 #define RBTX4939_IFAC2_ADDR (IO_BASE + TXX9_CE(1) + 0x00002006) 33 #define RBTX4939_SOFTINT_ADDR (IO_BASE + TXX9_CE(1) + 0x00003000) 34 #define RBTX4939_ISASTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004000) 35 #define RBTX4939_PCISTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004002) 36 #define RBTX4939_ROME_ADDR (IO_BASE + TXX9_CE(1) + 0x00004004) 37 #define RBTX4939_SPICS_ADDR (IO_BASE + TXX9_CE(1) + 0x00004006) 38 #define RBTX4939_AUDI_ADDR (IO_BASE + TXX9_CE(1) + 0x00004008) 39 #define RBTX4939_ISAGPIO_ADDR (IO_BASE + TXX9_CE(1) + 0x0000400a) 40 #define RBTX4939_PE1_ADDR (IO_BASE + TXX9_CE(1) + 0x00005000) 41 #define RBTX4939_PE2_ADDR (IO_BASE + TXX9_CE(1) + 0x00005002) 42 #define RBTX4939_PE3_ADDR (IO_BASE + TXX9_CE(1) + 0x00005004) 43 #define RBTX4939_VP_ADDR (IO_BASE + TXX9_CE(1) + 0x00005006) 44 #define RBTX4939_VPRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00005008) 45 #define RBTX4939_VPSOUT_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500a) 46 #define RBTX4939_VPSIN_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500c) 47 #define RBTX4939_7SEG_ADDR(s, ch) \ 48 (IO_BASE + TXX9_CE(1) + 0x00006000 + (s) * 16 + ((ch) & 3) * 2) 49 #define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000) 50 #define RBTX4939_RESETEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00007002) 51 #define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004) 52 #define RBTX4939_ETHER_BASE (IO_BASE + TXX9_CE(1) + 0x00020000) 53 54 /* Ethernet port address */ 55 #define RBTX4939_ETHER_ADDR (RBTX4939_ETHER_BASE + 0x300) 56 57 /* bits for IEN/IPOL/IFAC */ 58 #define RBTX4938_INTB_ISA0 0 59 #define RBTX4938_INTB_ISA11 1 60 #define RBTX4938_INTB_ISA12 2 61 #define RBTX4938_INTB_ISA15 3 62 #define RBTX4938_INTB_I2S 4 63 #define RBTX4938_INTB_SW 5 64 #define RBTX4938_INTF_ISA0 (1 << RBTX4938_INTB_ISA0) 65 #define RBTX4938_INTF_ISA11 (1 << RBTX4938_INTB_ISA11) 66 #define RBTX4938_INTF_ISA12 (1 << RBTX4938_INTB_ISA12) 67 #define RBTX4938_INTF_ISA15 (1 << RBTX4938_INTB_ISA15) 68 #define RBTX4938_INTF_I2S (1 << RBTX4938_INTB_I2S) 69 #define RBTX4938_INTF_SW (1 << RBTX4938_INTB_SW) 70 71 /* bits for PE1,PE2,PE3 */ 72 #define RBTX4939_PE1_ATA(ch) (0x01 << (ch)) 73 #define RBTX4939_PE1_RMII(ch) (0x04 << (ch)) 74 #define RBTX4939_PE2_SIO0 0x01 75 #define RBTX4939_PE2_SIO2 0x02 76 #define RBTX4939_PE2_SIO3 0x04 77 #define RBTX4939_PE2_CIR 0x08 78 #define RBTX4939_PE2_SPI 0x10 79 #define RBTX4939_PE2_GPIO 0x20 80 #define RBTX4939_PE3_VP 0x01 81 #define RBTX4939_PE3_VP_P 0x02 82 #define RBTX4939_PE3_VP_S 0x04 83 84 #define rbtx4939_board_rev_addr ((u8 __iomem *)RBTX4939_BOARD_REV_ADDR) 85 #define rbtx4939_ioc_rev_addr ((u8 __iomem *)RBTX4939_IOC_REV_ADDR) 86 #define rbtx4939_config1_addr ((u8 __iomem *)RBTX4939_CONFIG1_ADDR) 87 #define rbtx4939_config2_addr ((u8 __iomem *)RBTX4939_CONFIG2_ADDR) 88 #define rbtx4939_config3_addr ((u8 __iomem *)RBTX4939_CONFIG3_ADDR) 89 #define rbtx4939_config4_addr ((u8 __iomem *)RBTX4939_CONFIG4_ADDR) 90 #define rbtx4939_ustat_addr ((u8 __iomem *)RBTX4939_USTAT_ADDR) 91 #define rbtx4939_udipsw_addr ((u8 __iomem *)RBTX4939_UDIPSW_ADDR) 92 #define rbtx4939_bdipsw_addr ((u8 __iomem *)RBTX4939_BDIPSW_ADDR) 93 #define rbtx4939_ien_addr ((u8 __iomem *)RBTX4939_IEN_ADDR) 94 #define rbtx4939_ipol_addr ((u8 __iomem *)RBTX4939_IPOL_ADDR) 95 #define rbtx4939_ifac1_addr ((u8 __iomem *)RBTX4939_IFAC1_ADDR) 96 #define rbtx4939_ifac2_addr ((u8 __iomem *)RBTX4939_IFAC2_ADDR) 97 #define rbtx4939_softint_addr ((u8 __iomem *)RBTX4939_SOFTINT_ADDR) 98 #define rbtx4939_isastat_addr ((u8 __iomem *)RBTX4939_ISASTAT_ADDR) 99 #define rbtx4939_pcistat_addr ((u8 __iomem *)RBTX4939_PCISTAT_ADDR) 100 #define rbtx4939_rome_addr ((u8 __iomem *)RBTX4939_ROME_ADDR) 101 #define rbtx4939_spics_addr ((u8 __iomem *)RBTX4939_SPICS_ADDR) 102 #define rbtx4939_audi_addr ((u8 __iomem *)RBTX4939_AUDI_ADDR) 103 #define rbtx4939_isagpio_addr ((u8 __iomem *)RBTX4939_ISAGPIO_ADDR) 104 #define rbtx4939_pe1_addr ((u8 __iomem *)RBTX4939_PE1_ADDR) 105 #define rbtx4939_pe2_addr ((u8 __iomem *)RBTX4939_PE2_ADDR) 106 #define rbtx4939_pe3_addr ((u8 __iomem *)RBTX4939_PE3_ADDR) 107 #define rbtx4939_vp_addr ((u8 __iomem *)RBTX4939_VP_ADDR) 108 #define rbtx4939_vpreset_addr ((u8 __iomem *)RBTX4939_VPRESET_ADDR) 109 #define rbtx4939_vpsout_addr ((u8 __iomem *)RBTX4939_VPSOUT_ADDR) 110 #define rbtx4939_vpsin_addr ((u8 __iomem *)RBTX4939_VPSIN_ADDR) 111 #define rbtx4939_7seg_addr(s, ch) \ 112 ((u8 __iomem *)RBTX4939_7SEG_ADDR(s, ch)) 113 #define rbtx4939_softreset_addr ((u8 __iomem *)RBTX4939_SOFTRESET_ADDR) 114 #define rbtx4939_reseten_addr ((u8 __iomem *)RBTX4939_RESETEN_ADDR) 115 #define rbtx4939_resetstat_addr ((u8 __iomem *)RBTX4939_RESETSTAT_ADDR) 116 117 /* 118 * IRQ mappings 119 */ 120 #define RBTX4939_NR_IRQ_IOC 8 121 122 #define RBTX4939_IRQ_IOC (TXX9_IRQ_BASE + TX4939_NUM_IR) 123 #define RBTX4939_IRQ_END (RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC) 124 125 /* IOC (ISA, etc) */ 126 #define RBTX4939_IRQ_IOCINT (TXX9_IRQ_BASE + TX4939_IR_INT(0)) 127 /* Onboard 10M Ether */ 128 #define RBTX4939_IRQ_ETHER (TXX9_IRQ_BASE + TX4939_IR_INT(1)) 129 130 void rbtx4939_prom_init(void); 131 void rbtx4939_irq_setup(void); 132 133 struct mtd_partition; 134 struct map_info; 135 struct rbtx4939_flash_data { 136 unsigned int width; 137 unsigned int nr_parts; 138 struct mtd_partition *parts; 139 void (*map_init)(struct map_info *map); 140 }; 141 142 #endif /* __ASM_TXX9_RBTX4939_H */ 143