1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2017-2018 NXP 4 * 5 */ 6 7 #ifndef SC_RPC_H 8 #define SC_RPC_H 9 10 /* Note: Check SCFW API Released DOC before you want to modify something */ 11 /* Defines */ 12 13 #define SCFW_API_VERSION_MAJOR 1U 14 #define SCFW_API_VERSION_MINOR 15U 15 16 #define SC_RPC_VERSION 1U 17 18 #define SC_RPC_MAX_MSG 8U 19 20 #define RPC_VER(MSG) ((MSG)->version) 21 #define RPC_SIZE(MSG) ((MSG)->size) 22 #define RPC_SVC(MSG) ((MSG)->svc) 23 #define RPC_FUNC(MSG) ((MSG)->func) 24 #define RPC_R8(MSG) ((MSG)->func) 25 #define RPC_I64(MSG, IDX) ((s64)(RPC_U32((MSG), (IDX))) << 32ULL) | \ 26 (s64)(RPC_U32((MSG), (IDX) + 4U)) 27 #define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U]) 28 #define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U]) 29 #define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[(IDX)]) 30 #define RPC_U64(MSG, IDX) ((u64)(RPC_U32((MSG), (IDX))) << 32ULL) | \ 31 (u64)(RPC_U32((MSG), (IDX) + 4U)) 32 #define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U]) 33 #define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U]) 34 #define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[(IDX)]) 35 36 #define SC_RPC_SVC_UNKNOWN 0U 37 #define SC_RPC_SVC_RETURN 1U 38 #define SC_RPC_SVC_PM 2U 39 #define SC_RPC_SVC_RM 3U 40 #define SC_RPC_SVC_TIMER 5U 41 #define SC_RPC_SVC_PAD 6U 42 #define SC_RPC_SVC_MISC 7U 43 #define SC_RPC_SVC_IRQ 8U 44 #define SC_RPC_SVC_SECO 9U 45 #define SC_RPC_SVC_ABORT 10U 46 47 48 /* Types */ 49 50 struct sc_rpc_msg_s { 51 u8 version; 52 u8 size; 53 u8 svc; 54 u8 func; 55 union { 56 s32 i32[(SC_RPC_MAX_MSG - 1U)]; 57 s16 i16[(SC_RPC_MAX_MSG - 1U) * 2U]; 58 s8 i8[(SC_RPC_MAX_MSG - 1U) * 4U]; 59 u32 u32[(SC_RPC_MAX_MSG - 1U)]; 60 u16 u16[(SC_RPC_MAX_MSG - 1U) * 2U]; 61 u8 u8[(SC_RPC_MAX_MSG - 1U) * 4U]; 62 } DATA; 63 }; 64 65 /* PM RPC */ 66 #define PM_FUNC_UNKNOWN 0 67 #define PM_FUNC_SET_SYS_POWER_MODE 19U 68 #define PM_FUNC_SET_PARTITION_POWER_MODE 1U 69 #define PM_FUNC_GET_SYS_POWER_MODE 2U 70 #define PM_FUNC_SET_RESOURCE_POWER_MODE 3U 71 #define PM_FUNC_GET_RESOURCE_POWER_MODE 4U 72 #define PM_FUNC_REQ_LOW_POWER_MODE 16U 73 #define PM_FUNC_REQ_CPU_LOW_POWER_MODE 20U 74 #define PM_FUNC_SET_CPU_RESUME_ADDR 17U 75 #define PM_FUNC_SET_CPU_RESUME 21U 76 #define PM_FUNC_REQ_SYS_IF_POWER_MODE 18U 77 #define PM_FUNC_SET_CLOCK_RATE 5U 78 #define PM_FUNC_GET_CLOCK_RATE 6U 79 #define PM_FUNC_CLOCK_ENABLE 7U 80 #define PM_FUNC_SET_CLOCK_PARENT 14U 81 #define PM_FUNC_GET_CLOCK_PARENT 15U 82 #define PM_FUNC_RESET 13U 83 #define PM_FUNC_RESET_REASON 10U 84 #define PM_FUNC_BOOT 8U 85 #define PM_FUNC_REBOOT 9U 86 #define PM_FUNC_REBOOT_PARTITION 12U 87 #define PM_FUNC_CPU_START 11U 88 #define PM_FUNC_CPU_RESET 23U 89 #define PM_FUNC_RESOURCE_RESET 29U 90 #define PM_FUNC_IS_PARTITION_STARTED 24U 91 92 /* MISC RPC */ 93 #define MISC_FUNC_UNKNOWN 0 94 #define MISC_FUNC_SET_CONTROL 1U 95 #define MISC_FUNC_GET_CONTROL 2U 96 #define MISC_FUNC_SET_MAX_DMA_GROUP 4U 97 #define MISC_FUNC_SET_DMA_GROUP 5U 98 #define MISC_FUNC_SECO_IMAGE_LOAD 8U 99 #define MISC_FUNC_SECO_AUTHENTICATE 9U 100 #define MISC_FUNC_SECO_FUSE_WRITE 20U 101 #define MISC_FUNC_SECO_ENABLE_DEBUG 21U 102 #define MISC_FUNC_SECO_FORWARD_LIFECYCLE 22U 103 #define MISC_FUNC_SECO_RETURN_LIFECYCLE 23U 104 #define MISC_FUNC_SECO_BUILD_INFO 24U 105 #define MISC_FUNC_DEBUG_OUT 10U 106 #define MISC_FUNC_WAVEFORM_CAPTURE 6U 107 #define MISC_FUNC_BUILD_INFO 15U 108 #define MISC_FUNC_UNIQUE_ID 19U 109 #define MISC_FUNC_SET_ARI 3U 110 #define MISC_FUNC_BOOT_STATUS 7U 111 #define MISC_FUNC_BOOT_DONE 14U 112 #define MISC_FUNC_OTP_FUSE_READ 11U 113 #define MISC_FUNC_OTP_FUSE_WRITE 17U 114 #define MISC_FUNC_SET_TEMP 12U 115 #define MISC_FUNC_GET_TEMP 13U 116 #define MISC_FUNC_GET_BOOT_DEV 16U 117 #define MISC_FUNC_GET_BUTTON_STATUS 18U 118 #define MISC_FUNC_GET_BOOT_CONTAINER 36U 119 120 /* PAD RPC */ 121 #define PAD_FUNC_UNKNOWN 0 122 #define PAD_FUNC_SET_MUX 1U 123 #define PAD_FUNC_GET_MUX 6U 124 #define PAD_FUNC_SET_GP 2U 125 #define PAD_FUNC_GET_GP 7U 126 #define PAD_FUNC_SET_WAKEUP 4U 127 #define PAD_FUNC_GET_WAKEUP 9U 128 #define PAD_FUNC_SET_ALL 5U 129 #define PAD_FUNC_GET_ALL 10U 130 #define PAD_FUNC_SET 15U 131 #define PAD_FUNC_GET 16U 132 #define PAD_FUNC_SET_GP_28FDSOI 11U 133 #define PAD_FUNC_GET_GP_28FDSOI 12U 134 #define PAD_FUNC_SET_GP_28FDSOI_HSIC 3U 135 #define PAD_FUNC_GET_GP_28FDSOI_HSIC 8U 136 #define PAD_FUNC_SET_GP_28FDSOI_COMP 13U 137 #define PAD_FUNC_GET_GP_28FDSOI_COMP 14U 138 139 /* RM RPC */ 140 #define RM_FUNC_UNKNOWN 0 141 #define RM_FUNC_PARTITION_ALLOC 1U 142 #define RM_FUNC_SET_CONFIDENTIAL 31U 143 #define RM_FUNC_PARTITION_FREE 2U 144 #define RM_FUNC_GET_DID 26U 145 #define RM_FUNC_PARTITION_STATIC 3U 146 #define RM_FUNC_PARTITION_LOCK 4U 147 #define RM_FUNC_GET_PARTITION 5U 148 #define RM_FUNC_SET_PARENT 6U 149 #define RM_FUNC_MOVE_ALL 7U 150 #define RM_FUNC_ASSIGN_RESOURCE 8U 151 #define RM_FUNC_SET_RESOURCE_MOVABLE 9U 152 #define RM_FUNC_SET_SUBSYS_RSRC_MOVABLE 28U 153 #define RM_FUNC_SET_MASTER_ATTRIBUTES 10U 154 #define RM_FUNC_SET_MASTER_SID 11U 155 #define RM_FUNC_SET_PERIPHERAL_PERMISSIONS 12U 156 #define RM_FUNC_IS_RESOURCE_OWNED 13U 157 #define RM_FUNC_GET_RESOURCE_OWNER 33U 158 #define RM_FUNC_IS_RESOURCE_MASTER 14U 159 #define RM_FUNC_IS_RESOURCE_PERIPHERAL 15U 160 #define RM_FUNC_GET_RESOURCE_INFO 16U 161 #define RM_FUNC_MEMREG_ALLOC 17U 162 #define RM_FUNC_MEMREG_SPLIT 29U 163 #define RM_FUNC_MEMREG_FREE 18U 164 #define RM_FUNC_FIND_MEMREG 30U 165 #define RM_FUNC_ASSIGN_MEMREG 19U 166 #define RM_FUNC_SET_MEMREG_PERMISSIONS 20U 167 #define RM_FUNC_IS_MEMREG_OWNED 21U 168 #define RM_FUNC_GET_MEMREG_INFO 22U 169 #define RM_FUNC_ASSIGN_PAD 23U 170 #define RM_FUNC_SET_PAD_MOVABLE 24U 171 #define RM_FUNC_IS_PAD_OWNED 25U 172 #define RM_FUNC_DUMP 27U 173 174 /* SECO RPC */ 175 #define SECO_FUNC_UNKNOWN 0 /* Unknown function */ 176 #define SECO_FUNC_IMAGE_LOAD 1U /* Index for seco_image_load() RPC call */ 177 #define SECO_FUNC_AUTHENTICATE 2U /* Index for seco_authenticate() RPC call */ 178 #define SECO_FUNC_ENH_AUTHENTICATE 24U /* Index for sc_seco_enh_authenticate() RPC call */ 179 #define SECO_FUNC_FORWARD_LIFECYCLE 3U /* Index for seco_forward_lifecycle() RPC call */ 180 #define SECO_FUNC_RETURN_LIFECYCLE 4U /* Index for seco_return_lifecycle() RPC call */ 181 #define SECO_FUNC_COMMIT 5U /* Index for seco_commit() RPC call */ 182 #define SECO_FUNC_ATTEST_MODE 6U /* Index for seco_attest_mode() RPC call */ 183 #define SECO_FUNC_ATTEST 7U /* Index for seco_attest() RPC call */ 184 #define SECO_FUNC_GET_ATTEST_PKEY 8U /* Index for seco_get_attest_pkey() RPC call */ 185 #define SECO_FUNC_GET_ATTEST_SIGN 9U /* Index for seco_get_attest_sign() RPC call */ 186 #define SECO_FUNC_ATTEST_VERIFY 10U /* Index for seco_attest_verify() RPC call */ 187 #define SECO_FUNC_GEN_KEY_BLOB 11U /* Index for seco_gen_key_blob() RPC call */ 188 #define SECO_FUNC_LOAD_KEY 12U /* Index for seco_load_key() RPC call */ 189 #define SECO_FUNC_GET_MP_KEY 13U /* Index for seco_get_mp_key() RPC call */ 190 #define SECO_FUNC_UPDATE_MPMR 14U /* Index for seco_update_mpmr() RPC call */ 191 #define SECO_FUNC_GET_MP_SIGN 15U /* Index for seco_get_mp_sign() RPC call */ 192 #define SECO_FUNC_BUILD_INFO 16U /* Index for seco_build_info() RPC call */ 193 #define SECO_FUNC_CHIP_INFO 17U /* Index for seco_chip_info() RPC call */ 194 #define SECO_FUNC_ENABLE_DEBUG 18U /* Index for seco_enable_debug() RPC call */ 195 #define SECO_FUNC_GET_EVENT 19U /* Index for seco_get_event() RPC call */ 196 #define SECO_FUNC_FUSE_WRITE 20U /* Index for seco_fuse_write() RPC call */ 197 #define SECO_FUNC_PATCH 21U /* Index for sc_seco_patch() RPC call */ 198 #define SECO_FUNC_START_RNG 22U /* Index for sc_seco_start_rng() RPC call */ 199 #define SECO_FUNC_SAB_MSG 23U /* Index for sc_seco_sab_msg() RPC call */ 200 #define SECO_FUNC_SECVIO_ENABLE 25U /* Index for sc_seco_secvio_enable() RPC call */ 201 #define SECO_FUNC_SECVIO_CONFIG 26U /* Index for sc_seco_secvio_config() RPC call */ 202 #define SECO_FUNC_SECVIO_DGO_CONFIG 27U /* Index for sc_seco_secvio_dgo_config() RPC call */ 203 204 /* IRQ RPC */ 205 #define IRQ_FUNC_UNKNOWN 0 /* Unknown function */ 206 #define IRQ_FUNC_ENABLE 1U /* Index for sc_irq_enable() RPC call */ 207 #define IRQ_FUNC_STATUS 2U /* Index for sc_irq_status() RPC call */ 208 209 /* TIMER RPC */ 210 #define TIMER_FUNC_UNKNOWN 0 /* Unknown function */ 211 #define TIMER_FUNC_SET_WDOG_TIMEOUT 1U /* Index for sc_timer_set_wdog_timeout() RPC call */ 212 #define TIMER_FUNC_SET_WDOG_PRE_TIMEOUT 12U /* Index for sc_timer_set_wdog_pre_timeout() RPC call */ 213 #define TIMER_FUNC_START_WDOG 2U /* Index for sc_timer_start_wdog() RPC call */ 214 #define TIMER_FUNC_STOP_WDOG 3U /* Index for sc_timer_stop_wdog() RPC call */ 215 #define TIMER_FUNC_PING_WDOG 4U /* Index for sc_timer_ping_wdog() RPC call */ 216 #define TIMER_FUNC_GET_WDOG_STATUS 5U /* Index for sc_timer_get_wdog_status() RPC call */ 217 #define TIMER_FUNC_PT_GET_WDOG_STATUS 13U /* Index for sc_timer_pt_get_wdog_status() RPC call */ 218 #define TIMER_FUNC_SET_WDOG_ACTION 10U /* Index for sc_timer_set_wdog_action() RPC call */ 219 #define TIMER_FUNC_SET_RTC_TIME 6U /* Index for sc_timer_set_rtc_time() RPC call */ 220 #define TIMER_FUNC_GET_RTC_TIME 7U /* Index for sc_timer_get_rtc_time() RPC call */ 221 #define TIMER_FUNC_GET_RTC_SEC1970 9U /* Index for sc_timer_get_rtc_sec1970() RPC call */ 222 #define TIMER_FUNC_SET_RTC_ALARM 8U /* Index for sc_timer_set_rtc_alarm() RPC call */ 223 #define TIMER_FUNC_SET_RTC_PERIODIC_ALARM 14U /* Index for sc_timer_set_rtc_periodic_alarm() RPC call */ 224 #define TIMER_FUNC_CANCEL_RTC_ALARM 15U /* Index for sc_timer_cancel_rtc_alarm() RPC call */ 225 #define TIMER_FUNC_SET_RTC_CALB 11U /* Index for sc_timer_set_rtc_calb() RPC call */ 226 #define TIMER_FUNC_SET_SYSCTR_ALARM 16U /* Index for sc_timer_set_sysctr_alarm() RPC call */ 227 #define TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM 17U /* Index for sc_timer_set_sysctr_periodic_alarm() RPC call */ 228 #define TIMER_FUNC_CANCEL_SYSCTR_ALARM 18U /* Index for sc_timer_cancel_sysctr_alarm() RPC call */ 229 230 #endif /* SC_RPC_H */ 231