1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef LINUX_SSB_DRIVER_GIGE_H_
3 #define LINUX_SSB_DRIVER_GIGE_H_
4 
5 #include <linux/ssb/ssb.h>
6 #include <linux/bug.h>
7 #include <linux/pci.h>
8 #include <linux/spinlock.h>
9 
10 
11 #ifdef CONFIG_SSB_DRIVER_GIGE
12 
13 
14 #define SSB_GIGE_PCIIO			0x0000 /* PCI I/O Registers (1024 bytes) */
15 #define SSB_GIGE_RESERVED		0x0400 /* Reserved (1024 bytes) */
16 #define SSB_GIGE_PCICFG			0x0800 /* PCI config space (256 bytes) */
17 #define SSB_GIGE_SHIM_FLUSHSTAT		0x0C00 /* PCI to OCP: Flush status control (32bit) */
18 #define SSB_GIGE_SHIM_FLUSHRDA		0x0C04 /* PCI to OCP: Flush read address (32bit) */
19 #define SSB_GIGE_SHIM_FLUSHTO		0x0C08 /* PCI to OCP: Flush timeout counter (32bit) */
20 #define SSB_GIGE_SHIM_BARRIER		0x0C0C /* PCI to OCP: Barrier register (32bit) */
21 #define SSB_GIGE_SHIM_MAOCPSI		0x0C10 /* PCI to OCP: MaocpSI Control (32bit) */
22 #define SSB_GIGE_SHIM_SIOCPMA		0x0C14 /* PCI to OCP: SiocpMa Control (32bit) */
23 
24 /* TM Status High flags */
25 #define SSB_GIGE_TMSHIGH_RGMII		0x00010000 /* Have an RGMII PHY-bus */
26 /* TM Status Low flags */
27 #define SSB_GIGE_TMSLOW_TXBYPASS	0x00080000 /* TX bypass (no delay) */
28 #define SSB_GIGE_TMSLOW_RXBYPASS	0x00100000 /* RX bypass (no delay) */
29 #define SSB_GIGE_TMSLOW_DLLEN		0x01000000 /* Enable DLL controls */
30 
31 /* Boardflags (low) */
32 #define SSB_GIGE_BFL_ROBOSWITCH		0x0010
33 
34 
35 #define SSB_GIGE_MEM_RES_NAME		"SSB Broadcom 47xx GigE memory"
36 #define SSB_GIGE_IO_RES_NAME		"SSB Broadcom 47xx GigE I/O"
37 
38 struct ssb_gige {
39 	struct ssb_device *dev;
40 
41 	spinlock_t lock;
42 
43 	/* True, if the device has an RGMII bus.
44 	 * False, if the device has a GMII bus. */
45 	bool has_rgmii;
46 
47 	/* The PCI controller device. */
48 	struct pci_controller pci_controller;
49 	struct pci_ops pci_ops;
50 	struct resource mem_resource;
51 	struct resource io_resource;
52 };
53 
54 /* Check whether a PCI device is a SSB Gigabit Ethernet core. */
55 extern bool pdev_is_ssb_gige_core(struct pci_dev *pdev);
56 
57 /* Convert a pci_dev pointer to a ssb_gige pointer. */
pdev_to_ssb_gige(struct pci_dev * pdev)58 static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
59 {
60 	if (!pdev_is_ssb_gige_core(pdev))
61 		return NULL;
62 	return container_of(pdev->bus->ops, struct ssb_gige, pci_ops);
63 }
64 
65 /* Returns whether the PHY is connected by an RGMII bus. */
ssb_gige_is_rgmii(struct pci_dev * pdev)66 static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
67 {
68 	struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
69 	return (dev ? dev->has_rgmii : 0);
70 }
71 
72 /* Returns whether we have a Roboswitch. */
ssb_gige_have_roboswitch(struct pci_dev * pdev)73 static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
74 {
75 	struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
76 	if (dev)
77 		return !!(dev->dev->bus->sprom.boardflags_lo &
78 			  SSB_GIGE_BFL_ROBOSWITCH);
79 	return false;
80 }
81 
82 /* Returns whether we can only do one DMA at once. */
ssb_gige_one_dma_at_once(struct pci_dev * pdev)83 static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
84 {
85 	struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
86 	if (dev)
87 		return ((dev->dev->bus->chip_id == 0x4785) &&
88 			(dev->dev->bus->chip_rev < 2));
89 	return false;
90 }
91 
92 /* Returns whether we must flush posted writes. */
ssb_gige_must_flush_posted_writes(struct pci_dev * pdev)93 static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
94 {
95 	struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
96 	if (dev)
97 		return (dev->dev->bus->chip_id == 0x4785);
98 	return 0;
99 }
100 
101 /* Get the device MAC address */
ssb_gige_get_macaddr(struct pci_dev * pdev,u8 * macaddr)102 static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
103 {
104 	struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
105 	if (!dev)
106 		return -ENODEV;
107 
108 	memcpy(macaddr, dev->dev->bus->sprom.et0mac, 6);
109 	return 0;
110 }
111 
112 /* Get the device phy address */
ssb_gige_get_phyaddr(struct pci_dev * pdev)113 static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
114 {
115 	struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
116 	if (!dev)
117 		return -ENODEV;
118 
119 	return dev->dev->bus->sprom.et0phyaddr;
120 }
121 
122 extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
123 					  struct pci_dev *pdev);
124 extern int ssb_gige_map_irq(struct ssb_device *sdev,
125 			    const struct pci_dev *pdev);
126 
127 /* The GigE driver is not a standalone module, because we don't have support
128  * for unregistering the driver. So we could not unload the module anyway. */
129 extern int ssb_gige_init(void);
ssb_gige_exit(void)130 static inline void ssb_gige_exit(void)
131 {
132 	/* Currently we can not unregister the GigE driver,
133 	 * because we can not unregister the PCI bridge. */
134 	BUG();
135 }
136 
137 
138 #else /* CONFIG_SSB_DRIVER_GIGE */
139 /* Gigabit Ethernet driver disabled */
140 
141 
ssb_gige_pcibios_plat_dev_init(struct ssb_device * sdev,struct pci_dev * pdev)142 static inline int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
143 						 struct pci_dev *pdev)
144 {
145 	return -ENOSYS;
146 }
ssb_gige_map_irq(struct ssb_device * sdev,const struct pci_dev * pdev)147 static inline int ssb_gige_map_irq(struct ssb_device *sdev,
148 				   const struct pci_dev *pdev)
149 {
150 	return -ENOSYS;
151 }
ssb_gige_init(void)152 static inline int ssb_gige_init(void)
153 {
154 	return 0;
155 }
ssb_gige_exit(void)156 static inline void ssb_gige_exit(void)
157 {
158 }
159 
pdev_is_ssb_gige_core(struct pci_dev * pdev)160 static inline bool pdev_is_ssb_gige_core(struct pci_dev *pdev)
161 {
162 	return false;
163 }
pdev_to_ssb_gige(struct pci_dev * pdev)164 static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
165 {
166 	return NULL;
167 }
ssb_gige_is_rgmii(struct pci_dev * pdev)168 static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
169 {
170 	return false;
171 }
ssb_gige_have_roboswitch(struct pci_dev * pdev)172 static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
173 {
174 	return false;
175 }
ssb_gige_one_dma_at_once(struct pci_dev * pdev)176 static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
177 {
178 	return false;
179 }
ssb_gige_must_flush_posted_writes(struct pci_dev * pdev)180 static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
181 {
182 	return false;
183 }
ssb_gige_get_macaddr(struct pci_dev * pdev,u8 * macaddr)184 static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
185 {
186 	return -ENODEV;
187 }
ssb_gige_get_phyaddr(struct pci_dev * pdev)188 static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
189 {
190 	return -ENODEV;
191 }
192 
193 #endif /* CONFIG_SSB_DRIVER_GIGE */
194 #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
195