1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved 4 */ 5 6 #ifndef _MACH_STM32_H_ 7 #define _MACH_STM32_H_ 8 9 #ifndef __ASSEMBLY__ 10 #include <linux/bitops.h> 11 #endif 12 13 /* 14 * Peripheral memory map 15 * only address used before device tree parsing 16 */ 17 #define STM32_RCC_BASE 0x50000000 18 #define STM32_PWR_BASE 0x50001000 19 #define STM32_DBGMCU_BASE 0x50081000 20 #define STM32_FMC2_BASE 0x58002000 21 #define STM32_TZC_BASE 0x5C006000 22 #define STM32_ETZPC_BASE 0x5C007000 23 #define STM32_STGEN_BASE 0x5C008000 24 #define STM32_TAMP_BASE 0x5C00A000 25 26 #define STM32_USART1_BASE 0x5C000000 27 #define STM32_USART2_BASE 0x4000E000 28 #define STM32_USART3_BASE 0x4000F000 29 #define STM32_UART4_BASE 0x40010000 30 #define STM32_UART5_BASE 0x40011000 31 #define STM32_USART6_BASE 0x44003000 32 #define STM32_UART7_BASE 0x40018000 33 #define STM32_UART8_BASE 0x40019000 34 35 #define STM32_SYSRAM_BASE 0x2FFC0000 36 #define STM32_SYSRAM_SIZE SZ_256K 37 38 #define STM32_DDR_BASE 0xC0000000 39 #define STM32_DDR_SIZE SZ_1G 40 41 #ifndef __ASSEMBLY__ 42 /* enumerated used to identify the SYSCON driver instance */ 43 enum { 44 STM32MP_SYSCON_UNKNOWN, 45 STM32MP_SYSCON_SYSCFG, 46 }; 47 48 /* 49 * enumerated for boot interface from Bootrom, used in TAMP_BOOT_CONTEXT 50 * - boot device = bit 8:4 51 * - boot instance = bit 3:0 52 */ 53 #define BOOT_TYPE_MASK 0xF0 54 #define BOOT_TYPE_SHIFT 4 55 #define BOOT_INSTANCE_MASK 0x0F 56 #define BOOT_INSTANCE_SHIFT 0 57 58 enum boot_device { 59 BOOT_FLASH_SD = 0x10, 60 BOOT_FLASH_SD_1 = 0x11, 61 BOOT_FLASH_SD_2 = 0x12, 62 BOOT_FLASH_SD_3 = 0x13, 63 64 BOOT_FLASH_EMMC = 0x20, 65 BOOT_FLASH_EMMC_1 = 0x21, 66 BOOT_FLASH_EMMC_2 = 0x22, 67 BOOT_FLASH_EMMC_3 = 0x23, 68 69 BOOT_FLASH_NAND = 0x30, 70 BOOT_FLASH_NAND_FMC = 0x31, 71 72 BOOT_FLASH_NOR = 0x40, 73 BOOT_FLASH_NOR_QSPI = 0x41, 74 75 BOOT_SERIAL_UART = 0x50, 76 BOOT_SERIAL_UART_1 = 0x51, 77 BOOT_SERIAL_UART_2 = 0x52, 78 BOOT_SERIAL_UART_3 = 0x53, 79 BOOT_SERIAL_UART_4 = 0x54, 80 BOOT_SERIAL_UART_5 = 0x55, 81 BOOT_SERIAL_UART_6 = 0x56, 82 BOOT_SERIAL_UART_7 = 0x57, 83 BOOT_SERIAL_UART_8 = 0x58, 84 85 BOOT_SERIAL_USB = 0x60, 86 BOOT_SERIAL_USB_OTG = 0x62, 87 88 BOOT_FLASH_SPINAND = 0x70, 89 BOOT_FLASH_SPINAND_1 = 0x71, 90 }; 91 92 /* TAMP registers */ 93 #define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x) 94 #define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4) 95 #define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5) 96 #define TAMP_COPRO_RSC_TBL_ADDRESS TAMP_BACKUP_REGISTER(17) 97 #define TAMP_COPRO_STATE TAMP_BACKUP_REGISTER(18) 98 #define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(20) 99 #define TAMP_BOOTCOUNT TAMP_BACKUP_REGISTER(21) 100 101 #define TAMP_COPRO_STATE_OFF 0 102 #define TAMP_COPRO_STATE_INIT 1 103 #define TAMP_COPRO_STATE_CRUN 2 104 #define TAMP_COPRO_STATE_CSTOP 3 105 #define TAMP_COPRO_STATE_STANDBY 4 106 #define TAMP_COPRO_STATE_CRASH 5 107 108 #define TAMP_BOOT_MODE_MASK GENMASK(15, 8) 109 #define TAMP_BOOT_MODE_SHIFT 8 110 #define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4) 111 #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0) 112 #define TAMP_BOOT_FORCED_MASK GENMASK(7, 0) 113 #define TAMP_BOOT_DEBUG_ON BIT(16) 114 115 enum forced_boot_mode { 116 BOOT_NORMAL = 0x00, 117 BOOT_FASTBOOT = 0x01, 118 BOOT_RECOVERY = 0x02, 119 BOOT_STM32PROG = 0x03, 120 BOOT_UMS_MMC0 = 0x10, 121 BOOT_UMS_MMC1 = 0x11, 122 BOOT_UMS_MMC2 = 0x12, 123 }; 124 125 /* offset used for BSEC driver: misc_read and misc_write */ 126 #define STM32_BSEC_SHADOW_OFFSET 0x0 127 #define STM32_BSEC_SHADOW(id) (STM32_BSEC_SHADOW_OFFSET + (id) * 4) 128 #define STM32_BSEC_OTP_OFFSET 0x80000000 129 #define STM32_BSEC_OTP(id) (STM32_BSEC_OTP_OFFSET + (id) * 4) 130 #define STM32_BSEC_LOCK_OFFSET 0xC0000000 131 #define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4) 132 133 /* BSEC OTP index */ 134 #define BSEC_OTP_RPN 1 135 #define BSEC_OTP_SERIAL 13 136 #define BSEC_OTP_PKG 16 137 #define BSEC_OTP_MAC 57 138 #define BSEC_OTP_BOARD 59 139 140 #endif /* __ASSEMBLY__ */ 141 #endif /* _MACH_STM32_H_ */ 142