1 /*
2 * svm.h: SVM Architecture related definitions
3 * Copyright (c) 2005, AMD Corporation.
4 * Copyright (c) 2004, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; If not, see <http://www.gnu.org/licenses/>.
17 *
18 */
19
20 #ifndef __ASM_X86_HVM_SVM_H__
21 #define __ASM_X86_HVM_SVM_H__
22
23 #include <xen/types.h>
24
svm_vmload_pa(paddr_t vmcb)25 static inline void svm_vmload_pa(paddr_t vmcb)
26 {
27 asm volatile (
28 ".byte 0x0f,0x01,0xda" /* vmload */
29 : : "a" (vmcb) : "memory" );
30 }
31
svm_vmsave_pa(paddr_t vmcb)32 static inline void svm_vmsave_pa(paddr_t vmcb)
33 {
34 asm volatile (
35 ".byte 0x0f,0x01,0xdb" /* vmsave */
36 : : "a" (vmcb) : "memory" );
37 }
38
svm_invlpga(unsigned long linear,uint32_t asid)39 static inline void svm_invlpga(unsigned long linear, uint32_t asid)
40 {
41 asm volatile (
42 ".byte 0x0f,0x01,0xdf"
43 : /* output */
44 : /* input */
45 "a" (linear), "c" (asid));
46 }
47
48 unsigned long *svm_msrbit(unsigned long *msr_bitmap, uint32_t msr);
49 void __update_guest_eip(struct cpu_user_regs *regs, unsigned int inst_len);
50 void svm_update_guest_cr(struct vcpu *, unsigned int cr, unsigned int flags);
51
52 /*
53 * PV context switch helper. Calls with zero ldt_base request a prefetch of
54 * the VMCB area to be loaded from, instead of an actual load of state.
55 *
56 * Must only be used for NUL FS/GS, as the segment attributes/limits are not
57 * read from the GDT/LDT.
58 */
59 bool svm_load_segs(unsigned int ldt_ents, unsigned long ldt_base,
60 unsigned long fs_base, unsigned long gs_base,
61 unsigned long gs_shadow);
62
63 extern u32 svm_feature_flags;
64
65 #define SVM_FEATURE_NPT 0 /* Nested page table support */
66 #define SVM_FEATURE_LBRV 1 /* LBR virtualization support */
67 #define SVM_FEATURE_SVML 2 /* SVM locking MSR support */
68 #define SVM_FEATURE_NRIPS 3 /* Next RIP save on VMEXIT support */
69 #define SVM_FEATURE_TSCRATEMSR 4 /* TSC ratio MSR support */
70 #define SVM_FEATURE_VMCBCLEAN 5 /* VMCB clean bits support */
71 #define SVM_FEATURE_FLUSHBYASID 6 /* TLB flush by ASID support */
72 #define SVM_FEATURE_DECODEASSISTS 7 /* Decode assists support */
73 #define SVM_FEATURE_PAUSEFILTER 10 /* Pause intercept filter support */
74 #define SVM_FEATURE_PAUSETHRESH 12 /* Pause intercept filter support */
75 #define SVM_FEATURE_VLOADSAVE 15 /* virtual vmload/vmsave */
76 #define SVM_FEATURE_VGIF 16 /* Virtual GIF */
77
78 #define cpu_has_svm_feature(f) (svm_feature_flags & (1u << (f)))
79 #define cpu_has_svm_npt cpu_has_svm_feature(SVM_FEATURE_NPT)
80 #define cpu_has_svm_lbrv cpu_has_svm_feature(SVM_FEATURE_LBRV)
81 #define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML)
82 #define cpu_has_svm_nrips cpu_has_svm_feature(SVM_FEATURE_NRIPS)
83 #define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN)
84 #define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID)
85 #define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS)
86 #define cpu_has_svm_vgif cpu_has_svm_feature(SVM_FEATURE_VGIF)
87 #define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER)
88 #define cpu_has_pause_thresh cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH)
89 #define cpu_has_tsc_ratio cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR)
90 #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE)
91
92 #define SVM_PAUSEFILTER_INIT 4000
93 #define SVM_PAUSETHRESH_INIT 1000
94
95 /* TSC rate */
96 #define DEFAULT_TSC_RATIO 0x0000000100000000ULL
97 #define TSC_RATIO_RSVD_BITS 0xffffff0000000000ULL
98
99 /* EXITINFO1 fields on NPT faults */
100 #define _NPT_PFEC_with_gla 32
101 #define NPT_PFEC_with_gla (1UL<<_NPT_PFEC_with_gla)
102 #define _NPT_PFEC_in_gpt 33
103 #define NPT_PFEC_in_gpt (1UL<<_NPT_PFEC_in_gpt)
104
105 #endif /* __ASM_X86_HVM_SVM_H__ */
106