1 /* 2 * xen/include/asm-arm/exynos4210-uart.h 3 * 4 * Common constant definition between early printk and the UART driver 5 * for the exynos 4210 UART 6 * 7 * Julien Grall <julien.grall@linaro.org> 8 * Copyright (c) 2013 Linaro Limited. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 #ifndef __ASM_ARM_EXYNOS4210_H 22 #define __ASM_ARM_EXYNOS4210_H 23 24 25 /* 26 * this value is only valid for UART 2 and UART 3 27 * XXX: define per UART 28 */ 29 #define FIFO_MAX_SIZE 16 30 31 /* register addresses */ 32 #define ULCON (0x00) 33 #define UCON (0x04) 34 #define UFCON (0x08) 35 #define UMCON (0x0c) 36 #define UTRSTAT (0x10) 37 #define UERSTAT (0x14) 38 #define UFSTAT (0x18) 39 #define UMSTAT (0x1c) 40 #define UTXH (0x20) 41 #define URXH (0x24) 42 #define UBRDIV (0x28) 43 #define UFRACVAL (0x2c) 44 #define UINTP (0x30) 45 #define UINTS (0x34) 46 #define UINTM (0x38) 47 48 /* UCON */ 49 #define UCON_RX_IRQ (1 << 0) 50 #define UCON_TX_IRQ (1 << 2) 51 #define UCON_RX_TIMEOUT (1 << 7) 52 53 /* 54 * FIXME: IRQ_LEVEL should be 1 << n but with this value, the IRQ 55 * handler will never end... 56 */ 57 #define UCON_RX_IRQ_LEVEL (0 << 8) 58 #define UCON_TX_IRQ_LEVEL (0 << 9) 59 60 /* ULCON */ 61 #define ULCON_STOPB_SHIFT 2 62 #define ULCON_PARITY_SHIFT 3 63 64 /* UFCON */ 65 #define UFCON_FIFO_TX_RESET (1 << 2) 66 #define UFCON_FIFO_RX_RESET (1 << 1) 67 #define UFCON_FIFO_RESET (UFCON_FIFO_TX_RESET | UFCON_FIFO_RX_RESET) 68 #define UFCON_FIFO_EN (1 << 0) 69 70 #define UFCON_FIFO_TX_TRIGGER (0x6 << 8) 71 72 /* UMCON */ 73 #define UMCON_INT_EN (1 << 3) 74 75 /* UERSTAT */ 76 #define UERSTAT_OVERRUN (1 << 0) 77 #define UERSTAT_PARITY (1 << 1) 78 #define UERSTAT_FRAME (1 << 2) 79 #define UERSTAT_BREAK (1 << 3) 80 81 /* UFSTAT */ 82 #define UFSTAT_TX_FULL (1 << 24) 83 #define UFSTAT_TX_COUNT_SHIFT (16) 84 #define UFSTAT_TX_COUNT_MASK (0xff << UFSTAT_TX_COUNT_SHIFT) 85 #define UFSTAT_RX_FULL (1 << 8) 86 #define UFSTAT_RX_COUNT_SHIFT (0) 87 #define UFSTAT_RX_COUNT_MASK (0xff << UFSTAT_RX_COUNT_SHIFT) 88 89 /* UTRSTAT */ 90 #define UTRSTAT_TXFE (1 << 1) 91 #define UTRSTAT_TXE (1 << 2) 92 93 /* URHX */ 94 #define URXH_DATA_MASK (0xff) 95 96 /* Interrupt bits (UINTP, UINTS, UINTM) */ 97 #define UINTM_MODEM (1 << 3) 98 #define UINTM_TXD (1 << 2) 99 #define UINTM_ERROR (1 << 1) 100 #define UINTM_RXD (1 << 0) 101 #define UINTM_ALLI (UINTM_MODEM | UINTM_TXD | UINTM_ERROR | UINTM_RXD) 102 103 #endif /* __ASM_ARM_EXYNOS4210_H */ 104 105 /* 106 * Local variables: 107 * mode: C 108 * c-file-style: "BSD" 109 * c-basic-offset: 4 110 * indent-tabs-mode: nil 111 * End: 112 */ 113