1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /** 3 Support for Intel Camera Imaging ISP subsystem. 4 Copyright (c) 2010 - 2015, Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 */ 15 16 #ifndef _COMMON_ISP_CONST_H_ 17 #define _COMMON_ISP_CONST_H_ 18 19 /*#include "isp.h"*/ /* ISP_VEC_NELEMS */ 20 21 /* Binary independent constants */ 22 23 #ifndef NO_HOIST 24 # define NO_HOIST HIVE_ATTRIBUTE((no_hoist)) 25 #endif 26 27 #define NO_HOIST_CSE HIVE_ATTRIBUTE((no_hoist, no_cse)) 28 29 #define UNION struct /* Union constructors not allowed in C++ */ 30 31 #define XMEM_WIDTH_BITS HIVE_ISP_DDR_WORD_BITS 32 #define XMEM_SHORTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 16) 33 #define XMEM_INTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 32) 34 #define XMEM_POW2_BYTES_PER_WORD HIVE_ISP_DDR_WORD_BYTES 35 36 #define BITS8_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 8) 37 #define BITS16_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 16) 38 39 #if ISP_VEC_NELEMS == 64 40 #define ISP_NWAY_LOG2 6 41 #elif ISP_VEC_NELEMS == 32 42 #define ISP_NWAY_LOG2 5 43 #elif ISP_VEC_NELEMS == 16 44 #define ISP_NWAY_LOG2 4 45 #elif ISP_VEC_NELEMS == 8 46 #define ISP_NWAY_LOG2 3 47 #else 48 #error "isp_const.h ISP_VEC_NELEMS must be one of {8, 16, 32, 64}" 49 #endif 50 51 /* ***************************** 52 * ISP input/output buffer sizes 53 * ****************************/ 54 /* input image */ 55 #define INPUT_BUF_DMA_HEIGHT 2 56 #define INPUT_BUF_HEIGHT 2 /* double buffer */ 57 #define OUTPUT_BUF_DMA_HEIGHT 2 58 #define OUTPUT_BUF_HEIGHT 2 /* double buffer */ 59 #define OUTPUT_NUM_TRANSFERS 4 60 61 /* GDC accelerator: Up/Down Scaling */ 62 /* These should be moved to the gdc_defs.h in the device */ 63 #define UDS_SCALING_N HRT_GDC_N 64 /* AB: This should cover the zooming up to 16MP */ 65 #define UDS_MAX_OXDIM 5000 66 /* We support maximally 2 planes with different parameters 67 - luma and chroma (YUV420) */ 68 #define UDS_MAX_PLANES 2 69 #define UDS_BLI_BLOCK_HEIGHT 2 70 #define UDS_BCI_BLOCK_HEIGHT 4 71 #define UDS_BLI_INTERP_ENVELOPE 1 72 #define UDS_BCI_INTERP_ENVELOPE 3 73 #define UDS_MAX_ZOOM_FAC 64 74 /* Make it always one FPGA vector. 75 Four FPGA vectors are required and 76 four of them fit in one ASIC vector.*/ 77 #define UDS_MAX_CHUNKS 16 78 79 #define ISP_LEFT_PADDING _ISP_LEFT_CROP_EXTRA(ISP_LEFT_CROPPING) 80 #define ISP_LEFT_PADDING_VECS CEIL_DIV(ISP_LEFT_PADDING, ISP_VEC_NELEMS) 81 /* in case of continuous the croppong of the current binary doesn't matter for the buffer calculation, but the cropping of the sp copy should be used */ 82 #define ISP_LEFT_PADDING_CONT _ISP_LEFT_CROP_EXTRA(SH_CSS_MAX_LEFT_CROPPING) 83 #define ISP_LEFT_PADDING_VECS_CONT CEIL_DIV(ISP_LEFT_PADDING_CONT, ISP_VEC_NELEMS) 84 85 #define CEIL_ROUND_DIV_STRIPE(width, stripe, padding) \ 86 CEIL_MUL(padding + CEIL_DIV(width - padding, stripe), ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS) ? 4 : 2)) 87 88 /* output (Y,U,V) image, 4:2:0 */ 89 #define MAX_VECTORS_PER_LINE \ 90 CEIL_ROUND_DIV_STRIPE(CEIL_DIV(ISP_MAX_INTERNAL_WIDTH, ISP_VEC_NELEMS), \ 91 ISP_NUM_STRIPES, \ 92 ISP_LEFT_PADDING_VECS) 93 94 /* 95 * ITERATOR_VECTOR_INCREMENT' explanation: 96 * when striping an even number of iterations, one of the stripes is 97 * one iteration wider than the other to account for overlap 98 * so the calc for the output buffer vmem size is: 99 * ((width[vectors]/num_of_stripes) + 2[vectors]) 100 */ 101 #define MAX_VECTORS_PER_OUTPUT_LINE \ 102 CEIL_DIV(CEIL_DIV(ISP_MAX_OUTPUT_WIDTH, ISP_NUM_STRIPES) + ISP_LEFT_PADDING, ISP_VEC_NELEMS) 103 104 /* Must be even due to interlaced bayer input */ 105 #define MAX_VECTORS_PER_INPUT_LINE CEIL_MUL((CEIL_DIV(ISP_MAX_INPUT_WIDTH, ISP_VEC_NELEMS) + ISP_LEFT_PADDING_VECS), 2) 106 #define MAX_VECTORS_PER_INPUT_STRIPE CEIL_ROUND_DIV_STRIPE(MAX_VECTORS_PER_INPUT_LINE, \ 107 ISP_NUM_STRIPES, \ 108 ISP_LEFT_PADDING_VECS) 109 110 /* Add 2 for left croppping */ 111 #define MAX_SP_RAW_COPY_VECTORS_PER_INPUT_LINE (CEIL_DIV(ISP_MAX_INPUT_WIDTH, ISP_VEC_NELEMS) + 2) 112 113 #define MAX_VECTORS_PER_BUF_LINE \ 114 (MAX_VECTORS_PER_LINE + DUMMY_BUF_VECTORS) 115 #define MAX_VECTORS_PER_BUF_INPUT_LINE \ 116 (MAX_VECTORS_PER_INPUT_STRIPE + DUMMY_BUF_VECTORS) 117 #define MAX_OUTPUT_Y_FRAME_WIDTH \ 118 (MAX_VECTORS_PER_LINE * ISP_VEC_NELEMS) 119 #define MAX_OUTPUT_Y_FRAME_SIMDWIDTH \ 120 MAX_VECTORS_PER_LINE 121 #define MAX_OUTPUT_C_FRAME_WIDTH \ 122 (MAX_OUTPUT_Y_FRAME_WIDTH / 2) 123 #define MAX_OUTPUT_C_FRAME_SIMDWIDTH \ 124 CEIL_DIV(MAX_OUTPUT_C_FRAME_WIDTH, ISP_VEC_NELEMS) 125 126 /* should be even */ 127 #define NO_CHUNKING (OUTPUT_NUM_CHUNKS == 1) 128 129 #define MAX_VECTORS_PER_CHUNK \ 130 (NO_CHUNKING ? MAX_VECTORS_PER_LINE \ 131 : 2 * CEIL_DIV(MAX_VECTORS_PER_LINE, \ 132 2 * OUTPUT_NUM_CHUNKS)) 133 134 #define MAX_C_VECTORS_PER_CHUNK \ 135 (MAX_VECTORS_PER_CHUNK / 2) 136 137 /* should be even */ 138 #define MAX_VECTORS_PER_OUTPUT_CHUNK \ 139 (NO_CHUNKING ? MAX_VECTORS_PER_OUTPUT_LINE \ 140 : 2 * CEIL_DIV(MAX_VECTORS_PER_OUTPUT_LINE, \ 141 2 * OUTPUT_NUM_CHUNKS)) 142 143 #define MAX_C_VECTORS_PER_OUTPUT_CHUNK \ 144 (MAX_VECTORS_PER_OUTPUT_CHUNK / 2) 145 146 /* should be even */ 147 #define MAX_VECTORS_PER_INPUT_CHUNK \ 148 (INPUT_NUM_CHUNKS == 1 ? MAX_VECTORS_PER_INPUT_STRIPE \ 149 : 2 * CEIL_DIV(MAX_VECTORS_PER_INPUT_STRIPE, \ 150 2 * OUTPUT_NUM_CHUNKS)) 151 152 #define DEFAULT_C_SUBSAMPLING 2 153 154 /****** DMA buffer properties */ 155 156 #define RAW_BUF_LINES ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS) ? 4 : 2) 157 158 #define RAW_BUF_STRIDE \ 159 (BINARY_ID == SH_CSS_BINARY_ID_POST_ISP ? MAX_VECTORS_PER_INPUT_CHUNK : \ 160 ISP_NUM_STRIPES > 1 ? MAX_VECTORS_PER_INPUT_STRIPE + _ISP_EXTRA_PADDING_VECS : \ 161 !ENABLE_CONTINUOUS ? MAX_VECTORS_PER_INPUT_LINE : \ 162 MAX_VECTORS_PER_INPUT_CHUNK) 163 164 /* [isp vmem] table size[vectors] per line per color (GR,R,B,GB), 165 multiples of NWAY */ 166 #define ISP2400_SCTBL_VECTORS_PER_LINE_PER_COLOR \ 167 CEIL_DIV(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) 168 #define ISP2401_SCTBL_VECTORS_PER_LINE_PER_COLOR \ 169 CEIL_DIV(ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) 170 /* [isp vmem] table size[vectors] per line for 4colors (GR,R,B,GB), 171 multiples of NWAY */ 172 #define SCTBL_VECTORS_PER_LINE \ 173 (SCTBL_VECTORS_PER_LINE_PER_COLOR * IA_CSS_SC_NUM_COLORS) 174 175 /*************/ 176 177 /* Format for fixed primaries */ 178 179 #define ISP_FIXED_PRIMARY_FORMAT IA_CSS_FRAME_FORMAT_NV12 180 181 #endif /* _COMMON_ISP_CONST_H_ */ 182