1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /*
4 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 * Copyright 2003-2004 Jeff Garzik
6 *
7 * libata documentation is available via 'make {ps|pdf}docs',
8 * as Documentation/driver-api/libata.rst
9 *
10 * Hardware documentation available from http://www.t13.org/
11 */
12
13 #ifndef __LINUX_ATA_H__
14 #define __LINUX_ATA_H__
15
16 #include <linux/bits.h>
17 #include <linux/string.h>
18 #include <linux/types.h>
19 #include <asm/byteorder.h>
20
21 /* defines only for the constants which don't work well as enums */
22 #define ATA_DMA_BOUNDARY 0xffffUL
23 #define ATA_DMA_MASK 0xffffffffULL
24
25 enum {
26 /* various global constants */
27 ATA_MAX_DEVICES = 2, /* per bus/port */
28 ATA_MAX_PRD = 256, /* we could make these 256/256 */
29 ATA_SECT_SIZE = 512,
30 ATA_MAX_SECTORS_128 = 128,
31 ATA_MAX_SECTORS = 256,
32 ATA_MAX_SECTORS_1024 = 1024,
33 ATA_MAX_SECTORS_LBA48 = 65535,/* avoid count to be 0000h */
34 ATA_MAX_SECTORS_TAPE = 65535,
35 ATA_MAX_TRIM_RNUM = 64, /* 512-byte payload / (6-byte LBA + 2-byte range per entry) */
36
37 ATA_ID_WORDS = 256,
38 ATA_ID_CONFIG = 0,
39 ATA_ID_CYLS = 1,
40 ATA_ID_HEADS = 3,
41 ATA_ID_SECTORS = 6,
42 ATA_ID_SERNO = 10,
43 ATA_ID_BUF_SIZE = 21,
44 ATA_ID_FW_REV = 23,
45 ATA_ID_PROD = 27,
46 ATA_ID_MAX_MULTSECT = 47,
47 ATA_ID_DWORD_IO = 48, /* before ATA-8 */
48 ATA_ID_TRUSTED = 48, /* ATA-8 and later */
49 ATA_ID_CAPABILITY = 49,
50 ATA_ID_OLD_PIO_MODES = 51,
51 ATA_ID_OLD_DMA_MODES = 52,
52 ATA_ID_FIELD_VALID = 53,
53 ATA_ID_CUR_CYLS = 54,
54 ATA_ID_CUR_HEADS = 55,
55 ATA_ID_CUR_SECTORS = 56,
56 ATA_ID_MULTSECT = 59,
57 ATA_ID_LBA_CAPACITY = 60,
58 ATA_ID_SWDMA_MODES = 62,
59 ATA_ID_MWDMA_MODES = 63,
60 ATA_ID_PIO_MODES = 64,
61 ATA_ID_EIDE_DMA_MIN = 65,
62 ATA_ID_EIDE_DMA_TIME = 66,
63 ATA_ID_EIDE_PIO = 67,
64 ATA_ID_EIDE_PIO_IORDY = 68,
65 ATA_ID_ADDITIONAL_SUPP = 69,
66 ATA_ID_QUEUE_DEPTH = 75,
67 ATA_ID_SATA_CAPABILITY = 76,
68 ATA_ID_SATA_CAPABILITY_2 = 77,
69 ATA_ID_FEATURE_SUPP = 78,
70 ATA_ID_MAJOR_VER = 80,
71 ATA_ID_COMMAND_SET_1 = 82,
72 ATA_ID_COMMAND_SET_2 = 83,
73 ATA_ID_CFSSE = 84,
74 ATA_ID_CFS_ENABLE_1 = 85,
75 ATA_ID_CFS_ENABLE_2 = 86,
76 ATA_ID_CSF_DEFAULT = 87,
77 ATA_ID_UDMA_MODES = 88,
78 ATA_ID_HW_CONFIG = 93,
79 ATA_ID_SPG = 98,
80 ATA_ID_LBA_CAPACITY_2 = 100,
81 ATA_ID_SECTOR_SIZE = 106,
82 ATA_ID_WWN = 108,
83 ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
84 ATA_ID_COMMAND_SET_3 = 119,
85 ATA_ID_COMMAND_SET_4 = 120,
86 ATA_ID_LAST_LUN = 126,
87 ATA_ID_DLF = 128,
88 ATA_ID_CSFO = 129,
89 ATA_ID_CFA_POWER = 160,
90 ATA_ID_CFA_KEY_MGMT = 162,
91 ATA_ID_CFA_MODES = 163,
92 ATA_ID_DATA_SET_MGMT = 169,
93 ATA_ID_SCT_CMD_XPORT = 206,
94 ATA_ID_ROT_SPEED = 217,
95 ATA_ID_PIO4 = (1 << 1),
96
97 ATA_ID_SERNO_LEN = 20,
98 ATA_ID_FW_REV_LEN = 8,
99 ATA_ID_PROD_LEN = 40,
100 ATA_ID_WWN_LEN = 8,
101
102 ATA_PCI_CTL_OFS = 2,
103
104 ATA_PIO0 = (1 << 0),
105 ATA_PIO1 = ATA_PIO0 | (1 << 1),
106 ATA_PIO2 = ATA_PIO1 | (1 << 2),
107 ATA_PIO3 = ATA_PIO2 | (1 << 3),
108 ATA_PIO4 = ATA_PIO3 | (1 << 4),
109 ATA_PIO5 = ATA_PIO4 | (1 << 5),
110 ATA_PIO6 = ATA_PIO5 | (1 << 6),
111
112 ATA_PIO4_ONLY = (1 << 4),
113
114 ATA_SWDMA0 = (1 << 0),
115 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
116 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
117
118 ATA_SWDMA2_ONLY = (1 << 2),
119
120 ATA_MWDMA0 = (1 << 0),
121 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
122 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
123 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
124 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
125
126 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
127 ATA_MWDMA2_ONLY = (1 << 2),
128
129 ATA_UDMA0 = (1 << 0),
130 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
131 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
132 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
133 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
134 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
135 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
136 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
137 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
138
139 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
140
141 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
142
143 /* DMA-related */
144 ATA_PRD_SZ = 8,
145 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
146 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
147
148 ATA_DMA_TABLE_OFS = 4,
149 ATA_DMA_STATUS = 2,
150 ATA_DMA_CMD = 0,
151 ATA_DMA_WR = (1 << 3),
152 ATA_DMA_START = (1 << 0),
153 ATA_DMA_INTR = (1 << 2),
154 ATA_DMA_ERR = (1 << 1),
155 ATA_DMA_ACTIVE = (1 << 0),
156
157 /* bits in ATA command block registers */
158 ATA_HOB = (1 << 7), /* LBA48 selector */
159 ATA_NIEN = (1 << 1), /* disable-irq flag */
160 ATA_LBA = (1 << 6), /* LBA28 selector */
161 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
162 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
163 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
164 ATA_BUSY = (1 << 7), /* BSY status bit */
165 ATA_DRDY = (1 << 6), /* device ready */
166 ATA_DF = (1 << 5), /* device fault */
167 ATA_DSC = (1 << 4), /* drive seek complete */
168 ATA_DRQ = (1 << 3), /* data request i/o */
169 ATA_CORR = (1 << 2), /* corrected data error */
170 ATA_SENSE = (1 << 1), /* sense code available */
171 ATA_ERR = (1 << 0), /* have an error */
172 ATA_SRST = (1 << 2), /* software reset */
173 ATA_ICRC = (1 << 7), /* interface CRC error */
174 ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */
175 ATA_UNC = (1 << 6), /* uncorrectable media error */
176 ATA_MC = (1 << 5), /* media changed */
177 ATA_IDNF = (1 << 4), /* ID not found */
178 ATA_MCR = (1 << 3), /* media change requested */
179 ATA_ABORTED = (1 << 2), /* command aborted */
180 ATA_TRK0NF = (1 << 1), /* track 0 not found */
181 ATA_AMNF = (1 << 0), /* address mark not found */
182 ATAPI_LFS = 0xF0, /* last failed sense */
183 ATAPI_EOM = ATA_TRK0NF, /* end of media */
184 ATAPI_ILI = ATA_AMNF, /* illegal length indication */
185 ATAPI_IO = (1 << 1),
186 ATAPI_COD = (1 << 0),
187
188 /* ATA command block registers */
189 ATA_REG_DATA = 0x00,
190 ATA_REG_ERR = 0x01,
191 ATA_REG_NSECT = 0x02,
192 ATA_REG_LBAL = 0x03,
193 ATA_REG_LBAM = 0x04,
194 ATA_REG_LBAH = 0x05,
195 ATA_REG_DEVICE = 0x06,
196 ATA_REG_STATUS = 0x07,
197
198 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
199 ATA_REG_CMD = ATA_REG_STATUS,
200 ATA_REG_BYTEL = ATA_REG_LBAM,
201 ATA_REG_BYTEH = ATA_REG_LBAH,
202 ATA_REG_DEVSEL = ATA_REG_DEVICE,
203 ATA_REG_IRQ = ATA_REG_NSECT,
204
205 /* ATA device commands */
206 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
207 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
208 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
209 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
210 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
211 ATA_CMD_DOWNLOAD_MICRO = 0x92,
212 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
213 ATA_CMD_NOP = 0x00,
214 ATA_CMD_FLUSH = 0xE7,
215 ATA_CMD_FLUSH_EXT = 0xEA,
216 ATA_CMD_ID_ATA = 0xEC,
217 ATA_CMD_ID_ATAPI = 0xA1,
218 ATA_CMD_SERVICE = 0xA2,
219 ATA_CMD_READ = 0xC8,
220 ATA_CMD_READ_EXT = 0x25,
221 ATA_CMD_READ_QUEUED = 0x26,
222 ATA_CMD_READ_STREAM_EXT = 0x2B,
223 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
224 ATA_CMD_WRITE = 0xCA,
225 ATA_CMD_WRITE_EXT = 0x35,
226 ATA_CMD_WRITE_QUEUED = 0x36,
227 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
228 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
229 ATA_CMD_WRITE_FUA_EXT = 0x3D,
230 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
231 ATA_CMD_FPDMA_READ = 0x60,
232 ATA_CMD_FPDMA_WRITE = 0x61,
233 ATA_CMD_NCQ_NON_DATA = 0x63,
234 ATA_CMD_FPDMA_SEND = 0x64,
235 ATA_CMD_FPDMA_RECV = 0x65,
236 ATA_CMD_PIO_READ = 0x20,
237 ATA_CMD_PIO_READ_EXT = 0x24,
238 ATA_CMD_PIO_WRITE = 0x30,
239 ATA_CMD_PIO_WRITE_EXT = 0x34,
240 ATA_CMD_READ_MULTI = 0xC4,
241 ATA_CMD_READ_MULTI_EXT = 0x29,
242 ATA_CMD_WRITE_MULTI = 0xC5,
243 ATA_CMD_WRITE_MULTI_EXT = 0x39,
244 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
245 ATA_CMD_SET_FEATURES = 0xEF,
246 ATA_CMD_SET_MULTI = 0xC6,
247 ATA_CMD_PACKET = 0xA0,
248 ATA_CMD_VERIFY = 0x40,
249 ATA_CMD_VERIFY_EXT = 0x42,
250 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
251 ATA_CMD_STANDBYNOW1 = 0xE0,
252 ATA_CMD_IDLEIMMEDIATE = 0xE1,
253 ATA_CMD_SLEEP = 0xE6,
254 ATA_CMD_INIT_DEV_PARAMS = 0x91,
255 ATA_CMD_READ_NATIVE_MAX = 0xF8,
256 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
257 ATA_CMD_SET_MAX = 0xF9,
258 ATA_CMD_SET_MAX_EXT = 0x37,
259 ATA_CMD_READ_LOG_EXT = 0x2F,
260 ATA_CMD_WRITE_LOG_EXT = 0x3F,
261 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
262 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
263 ATA_CMD_TRUSTED_NONDATA = 0x5B,
264 ATA_CMD_TRUSTED_RCV = 0x5C,
265 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
266 ATA_CMD_TRUSTED_SND = 0x5E,
267 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
268 ATA_CMD_PMP_READ = 0xE4,
269 ATA_CMD_PMP_READ_DMA = 0xE9,
270 ATA_CMD_PMP_WRITE = 0xE8,
271 ATA_CMD_PMP_WRITE_DMA = 0xEB,
272 ATA_CMD_CONF_OVERLAY = 0xB1,
273 ATA_CMD_SEC_SET_PASS = 0xF1,
274 ATA_CMD_SEC_UNLOCK = 0xF2,
275 ATA_CMD_SEC_ERASE_PREP = 0xF3,
276 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
277 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
278 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
279 ATA_CMD_CONFIG_STREAM = 0x51,
280 ATA_CMD_SMART = 0xB0,
281 ATA_CMD_MEDIA_LOCK = 0xDE,
282 ATA_CMD_MEDIA_UNLOCK = 0xDF,
283 ATA_CMD_DSM = 0x06,
284 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
285 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
286 ATA_CMD_CFA_WRITE_NE = 0x38,
287 ATA_CMD_CFA_TRANS_SECT = 0x87,
288 ATA_CMD_CFA_ERASE = 0xC0,
289 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
290 ATA_CMD_REQ_SENSE_DATA = 0x0B,
291 ATA_CMD_SANITIZE_DEVICE = 0xB4,
292 ATA_CMD_ZAC_MGMT_IN = 0x4A,
293 ATA_CMD_ZAC_MGMT_OUT = 0x9F,
294
295 /* marked obsolete in the ATA/ATAPI-7 spec */
296 ATA_CMD_RESTORE = 0x10,
297
298 /* Subcmds for ATA_CMD_FPDMA_RECV */
299 ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01,
300 ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN = 0x02,
301
302 /* Subcmds for ATA_CMD_FPDMA_SEND */
303 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
304 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
305
306 /* Subcmds for ATA_CMD_NCQ_NON_DATA */
307 ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE = 0x00,
308 ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05,
309 ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT = 0x06,
310 ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07,
311
312 /* Subcmds for ATA_CMD_ZAC_MGMT_IN */
313 ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00,
314
315 /* Subcmds for ATA_CMD_ZAC_MGMT_OUT */
316 ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01,
317 ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02,
318 ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03,
319 ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04,
320
321 /* READ_LOG_EXT pages */
322 ATA_LOG_DIRECTORY = 0x0,
323 ATA_LOG_SATA_NCQ = 0x10,
324 ATA_LOG_NCQ_NON_DATA = 0x12,
325 ATA_LOG_NCQ_SEND_RECV = 0x13,
326 ATA_LOG_IDENTIFY_DEVICE = 0x30,
327
328 /* Identify device log pages: */
329 ATA_LOG_SECURITY = 0x06,
330 ATA_LOG_SATA_SETTINGS = 0x08,
331 ATA_LOG_ZONED_INFORMATION = 0x09,
332 ATA_LOG_CONCURRENT_POSITIONING_RANGES = 0x47,
333
334 /* Identify device SATA settings log:*/
335 ATA_LOG_DEVSLP_OFFSET = 0x30,
336 ATA_LOG_DEVSLP_SIZE = 0x08,
337 ATA_LOG_DEVSLP_MDAT = 0x00,
338 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
339 ATA_LOG_DEVSLP_DETO = 0x01,
340 ATA_LOG_DEVSLP_VALID = 0x07,
341 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
342 ATA_LOG_NCQ_PRIO_OFFSET = 0x09,
343
344 /* NCQ send and receive log */
345 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
346 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
347 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
348 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
349 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
350 ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED = (1 << 0),
351 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
352 ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED = (1 << 0),
353 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET = 0x10,
354 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0),
355 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1),
356 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x14,
357
358 /* NCQ Non-Data log */
359 ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET = 0x00,
360 ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET = 0x00,
361 ATA_LOG_NCQ_NON_DATA_ABORT_NCQ = (1 << 0),
362 ATA_LOG_NCQ_NON_DATA_ABORT_ALL = (1 << 1),
363 ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING = (1 << 2),
364 ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3),
365 ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED = (1 << 4),
366 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET = 0x1C,
367 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT = (1 << 0),
368 ATA_LOG_NCQ_NON_DATA_SIZE = 0x40,
369
370 /* READ/WRITE LONG (obsolete) */
371 ATA_CMD_READ_LONG = 0x22,
372 ATA_CMD_READ_LONG_ONCE = 0x23,
373 ATA_CMD_WRITE_LONG = 0x32,
374 ATA_CMD_WRITE_LONG_ONCE = 0x33,
375
376 /* SETFEATURES stuff */
377 SETFEATURES_XFER = 0x03,
378 XFER_UDMA_7 = 0x47,
379 XFER_UDMA_6 = 0x46,
380 XFER_UDMA_5 = 0x45,
381 XFER_UDMA_4 = 0x44,
382 XFER_UDMA_3 = 0x43,
383 XFER_UDMA_2 = 0x42,
384 XFER_UDMA_1 = 0x41,
385 XFER_UDMA_0 = 0x40,
386 XFER_MW_DMA_4 = 0x24, /* CFA only */
387 XFER_MW_DMA_3 = 0x23, /* CFA only */
388 XFER_MW_DMA_2 = 0x22,
389 XFER_MW_DMA_1 = 0x21,
390 XFER_MW_DMA_0 = 0x20,
391 XFER_SW_DMA_2 = 0x12,
392 XFER_SW_DMA_1 = 0x11,
393 XFER_SW_DMA_0 = 0x10,
394 XFER_PIO_6 = 0x0E, /* CFA only */
395 XFER_PIO_5 = 0x0D, /* CFA only */
396 XFER_PIO_4 = 0x0C,
397 XFER_PIO_3 = 0x0B,
398 XFER_PIO_2 = 0x0A,
399 XFER_PIO_1 = 0x09,
400 XFER_PIO_0 = 0x08,
401 XFER_PIO_SLOW = 0x00,
402
403 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
404 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
405
406 SETFEATURES_RA_ON = 0xaa, /* Enable read look-ahead */
407 SETFEATURES_RA_OFF = 0x55, /* Disable read look-ahead */
408
409 /* Enable/Disable Automatic Acoustic Management */
410 SETFEATURES_AAM_ON = 0x42,
411 SETFEATURES_AAM_OFF = 0xC2,
412
413 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
414 SETFEATURES_SPINUP_TIMEOUT = 30000, /* 30s timeout for drive spin-up from PUIS */
415
416 SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
417 SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
418
419 /* SETFEATURE Sector counts for SATA features */
420 SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */
421 SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */
422 SATA_DIPM = 0x03, /* Device Initiated Power Management */
423 SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */
424 SATA_AN = 0x05, /* Asynchronous Notification */
425 SATA_SSP = 0x06, /* Software Settings Preservation */
426 SATA_DEVSLP = 0x09, /* Device Sleep */
427
428 SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
429
430 /* feature values for SET_MAX */
431 ATA_SET_MAX_ADDR = 0x00,
432 ATA_SET_MAX_PASSWD = 0x01,
433 ATA_SET_MAX_LOCK = 0x02,
434 ATA_SET_MAX_UNLOCK = 0x03,
435 ATA_SET_MAX_FREEZE_LOCK = 0x04,
436 ATA_SET_MAX_PASSWD_DMA = 0x05,
437 ATA_SET_MAX_UNLOCK_DMA = 0x06,
438
439 /* feature values for DEVICE CONFIGURATION OVERLAY */
440 ATA_DCO_RESTORE = 0xC0,
441 ATA_DCO_FREEZE_LOCK = 0xC1,
442 ATA_DCO_IDENTIFY = 0xC2,
443 ATA_DCO_SET = 0xC3,
444
445 /* feature values for SMART */
446 ATA_SMART_ENABLE = 0xD8,
447 ATA_SMART_READ_VALUES = 0xD0,
448 ATA_SMART_READ_THRESHOLDS = 0xD1,
449
450 /* feature values for Data Set Management */
451 ATA_DSM_TRIM = 0x01,
452
453 /* password used in LBA Mid / LBA High for executing SMART commands */
454 ATA_SMART_LBAM_PASS = 0x4F,
455 ATA_SMART_LBAH_PASS = 0xC2,
456
457 /* ATAPI stuff */
458 ATAPI_PKT_DMA = (1 << 0),
459 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
460 0=to device, 1=to host */
461 ATAPI_CDB_LEN = 16,
462
463 /* PMP stuff */
464 SATA_PMP_MAX_PORTS = 15,
465 SATA_PMP_CTRL_PORT = 15,
466
467 SATA_PMP_GSCR_DWORDS = 128,
468 SATA_PMP_GSCR_PROD_ID = 0,
469 SATA_PMP_GSCR_REV = 1,
470 SATA_PMP_GSCR_PORT_INFO = 2,
471 SATA_PMP_GSCR_ERROR = 32,
472 SATA_PMP_GSCR_ERROR_EN = 33,
473 SATA_PMP_GSCR_FEAT = 64,
474 SATA_PMP_GSCR_FEAT_EN = 96,
475
476 SATA_PMP_PSCR_STATUS = 0,
477 SATA_PMP_PSCR_ERROR = 1,
478 SATA_PMP_PSCR_CONTROL = 2,
479
480 SATA_PMP_FEAT_BIST = (1 << 0),
481 SATA_PMP_FEAT_PMREQ = (1 << 1),
482 SATA_PMP_FEAT_DYNSSC = (1 << 2),
483 SATA_PMP_FEAT_NOTIFY = (1 << 3),
484
485 /* cable types */
486 ATA_CBL_NONE = 0,
487 ATA_CBL_PATA40 = 1,
488 ATA_CBL_PATA80 = 2,
489 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
490 ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
491 ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
492 ATA_CBL_SATA = 6,
493
494 /* SATA Status and Control Registers */
495 SCR_STATUS = 0,
496 SCR_ERROR = 1,
497 SCR_CONTROL = 2,
498 SCR_ACTIVE = 3,
499 SCR_NOTIFICATION = 4,
500
501 /* SError bits */
502 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
503 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
504 SERR_DATA = (1 << 8), /* unrecovered data error */
505 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
506 SERR_PROTOCOL = (1 << 10), /* protocol violation */
507 SERR_INTERNAL = (1 << 11), /* host internal error */
508 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
509 SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
510 SERR_COMM_WAKE = (1 << 18), /* Comm wake */
511 SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
512 SERR_DISPARITY = (1 << 20), /* Disparity */
513 SERR_CRC = (1 << 21), /* CRC error */
514 SERR_HANDSHAKE = (1 << 22), /* Handshake error */
515 SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
516 SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
517 SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
518 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
519 };
520
521 enum ata_prot_flags {
522 /* protocol flags */
523 ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */
524 ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */
525 ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */
526 ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */
527
528 /* taskfile protocols */
529 ATA_PROT_UNKNOWN = (u8)-1,
530 ATA_PROT_NODATA = 0,
531 ATA_PROT_PIO = ATA_PROT_FLAG_PIO,
532 ATA_PROT_DMA = ATA_PROT_FLAG_DMA,
533 ATA_PROT_NCQ_NODATA = ATA_PROT_FLAG_NCQ,
534 ATA_PROT_NCQ = ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ,
535 ATAPI_PROT_NODATA = ATA_PROT_FLAG_ATAPI,
536 ATAPI_PROT_PIO = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO,
537 ATAPI_PROT_DMA = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA,
538 };
539
540 enum ata_ioctls {
541 ATA_IOC_GET_IO32 = 0x309, /* HDIO_GET_32BIT */
542 ATA_IOC_SET_IO32 = 0x324, /* HDIO_SET_32BIT */
543 };
544
545 /* core structures */
546
547 struct ata_bmdma_prd {
548 __le32 addr;
549 __le32 flags_len;
550 };
551
552 /*
553 * id tests
554 */
555 #define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
556 #define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
557 #define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
558 #define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
559 #define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
560 #define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
561 #define ata_id_has_atapi_AN(id) \
562 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
563 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
564 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
565 #define ata_id_has_fpdma_aa(id) \
566 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
567 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
568 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
569 #define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
570 #define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
571 #define ata_id_u32(id,n) \
572 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
573 #define ata_id_u64(id,n) \
574 ( ((u64) (id)[(n) + 3] << 48) | \
575 ((u64) (id)[(n) + 2] << 32) | \
576 ((u64) (id)[(n) + 1] << 16) | \
577 ((u64) (id)[(n) + 0]) )
578
579 #define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
580 #define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
581 #define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
582 #define ata_id_has_ncq_autosense(id) \
583 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))
584
ata_id_has_hipm(const u16 * id)585 static inline bool ata_id_has_hipm(const u16 *id)
586 {
587 u16 val = id[ATA_ID_SATA_CAPABILITY];
588
589 if (val == 0 || val == 0xffff)
590 return false;
591
592 return val & (1 << 9);
593 }
594
ata_id_has_dipm(const u16 * id)595 static inline bool ata_id_has_dipm(const u16 *id)
596 {
597 u16 val = id[ATA_ID_FEATURE_SUPP];
598
599 if (val == 0 || val == 0xffff)
600 return false;
601
602 return val & (1 << 3);
603 }
604
605
ata_id_has_fua(const u16 * id)606 static inline bool ata_id_has_fua(const u16 *id)
607 {
608 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
609 return false;
610 return id[ATA_ID_CFSSE] & (1 << 6);
611 }
612
ata_id_has_flush(const u16 * id)613 static inline bool ata_id_has_flush(const u16 *id)
614 {
615 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
616 return false;
617 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
618 }
619
ata_id_flush_enabled(const u16 * id)620 static inline bool ata_id_flush_enabled(const u16 *id)
621 {
622 if (ata_id_has_flush(id) == 0)
623 return false;
624 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
625 return false;
626 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
627 }
628
ata_id_has_flush_ext(const u16 * id)629 static inline bool ata_id_has_flush_ext(const u16 *id)
630 {
631 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
632 return false;
633 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
634 }
635
ata_id_flush_ext_enabled(const u16 * id)636 static inline bool ata_id_flush_ext_enabled(const u16 *id)
637 {
638 if (ata_id_has_flush_ext(id) == 0)
639 return false;
640 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
641 return false;
642 /*
643 * some Maxtor disks have bit 13 defined incorrectly
644 * so check bit 10 too
645 */
646 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
647 }
648
ata_id_logical_sector_size(const u16 * id)649 static inline u32 ata_id_logical_sector_size(const u16 *id)
650 {
651 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
652 * IDENTIFY DEVICE data, word 117-118.
653 * 0xd000 ignores bit 13 (logical:physical > 1)
654 */
655 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
656 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
657 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
658 return ATA_SECT_SIZE;
659 }
660
ata_id_log2_per_physical_sector(const u16 * id)661 static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
662 {
663 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
664 * IDENTIFY DEVICE data, word 106.
665 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
666 */
667 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
668 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
669 return 0;
670 }
671
672 /* Offset of logical sectors relative to physical sectors.
673 *
674 * If device has more than one logical sector per physical sector
675 * (aka 512 byte emulation), vendors might offset the "sector 0" address
676 * so sector 63 is "naturally aligned" - e.g. FAT partition table.
677 * This avoids Read/Mod/Write penalties when using FAT partition table
678 * and updating "well aligned" (FS perspective) physical sectors on every
679 * transaction.
680 */
ata_id_logical_sector_offset(const u16 * id,u8 log2_per_phys)681 static inline u16 ata_id_logical_sector_offset(const u16 *id,
682 u8 log2_per_phys)
683 {
684 u16 word_209 = id[209];
685
686 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
687 u16 first = word_209 & 0x3fff;
688 if (first > 0)
689 return (1 << log2_per_phys) - first;
690 }
691 return 0;
692 }
693
ata_id_has_lba48(const u16 * id)694 static inline bool ata_id_has_lba48(const u16 *id)
695 {
696 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
697 return false;
698 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
699 return false;
700 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
701 }
702
ata_id_lba48_enabled(const u16 * id)703 static inline bool ata_id_lba48_enabled(const u16 *id)
704 {
705 if (ata_id_has_lba48(id) == 0)
706 return false;
707 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
708 return false;
709 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
710 }
711
ata_id_hpa_enabled(const u16 * id)712 static inline bool ata_id_hpa_enabled(const u16 *id)
713 {
714 /* Yes children, word 83 valid bits cover word 82 data */
715 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
716 return false;
717 /* And 87 covers 85-87 */
718 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
719 return false;
720 /* Check command sets enabled as well as supported */
721 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
722 return false;
723 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
724 }
725
ata_id_has_wcache(const u16 * id)726 static inline bool ata_id_has_wcache(const u16 *id)
727 {
728 /* Yes children, word 83 valid bits cover word 82 data */
729 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
730 return false;
731 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
732 }
733
ata_id_has_pm(const u16 * id)734 static inline bool ata_id_has_pm(const u16 *id)
735 {
736 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
737 return false;
738 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
739 }
740
ata_id_rahead_enabled(const u16 * id)741 static inline bool ata_id_rahead_enabled(const u16 *id)
742 {
743 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
744 return false;
745 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
746 }
747
ata_id_wcache_enabled(const u16 * id)748 static inline bool ata_id_wcache_enabled(const u16 *id)
749 {
750 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
751 return false;
752 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
753 }
754
ata_id_has_read_log_dma_ext(const u16 * id)755 static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
756 {
757 /* Word 86 must have bit 15 set */
758 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
759 return false;
760
761 /* READ LOG DMA EXT support can be signaled either from word 119
762 * or from word 120. The format is the same for both words: Bit
763 * 15 must be cleared, bit 14 set and bit 3 set.
764 */
765 if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
766 (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
767 return true;
768
769 return false;
770 }
771
ata_id_has_sense_reporting(const u16 * id)772 static inline bool ata_id_has_sense_reporting(const u16 *id)
773 {
774 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
775 return false;
776 return id[ATA_ID_COMMAND_SET_3] & (1 << 6);
777 }
778
ata_id_sense_reporting_enabled(const u16 * id)779 static inline bool ata_id_sense_reporting_enabled(const u16 *id)
780 {
781 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
782 return false;
783 return id[ATA_ID_COMMAND_SET_4] & (1 << 6);
784 }
785
786 /**
787 *
788 * Word: 206 - SCT Command Transport
789 * 15:12 - Vendor Specific
790 * 11:6 - Reserved
791 * 5 - SCT Command Transport Data Tables supported
792 * 4 - SCT Command Transport Features Control supported
793 * 3 - SCT Command Transport Error Recovery Control supported
794 * 2 - SCT Command Transport Write Same supported
795 * 1 - SCT Command Transport Long Sector Access supported
796 * 0 - SCT Command Transport supported
797 */
ata_id_sct_data_tables(const u16 * id)798 static inline bool ata_id_sct_data_tables(const u16 *id)
799 {
800 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 5) ? true : false;
801 }
802
ata_id_sct_features_ctrl(const u16 * id)803 static inline bool ata_id_sct_features_ctrl(const u16 *id)
804 {
805 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 4) ? true : false;
806 }
807
ata_id_sct_error_recovery_ctrl(const u16 * id)808 static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id)
809 {
810 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false;
811 }
812
ata_id_sct_long_sector_access(const u16 * id)813 static inline bool ata_id_sct_long_sector_access(const u16 *id)
814 {
815 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false;
816 }
817
ata_id_sct_supported(const u16 * id)818 static inline bool ata_id_sct_supported(const u16 *id)
819 {
820 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 0) ? true : false;
821 }
822
823 /**
824 * ata_id_major_version - get ATA level of drive
825 * @id: Identify data
826 *
827 * Caveats:
828 * ATA-1 considers identify optional
829 * ATA-2 introduces mandatory identify
830 * ATA-3 introduces word 80 and accurate reporting
831 *
832 * The practical impact of this is that ata_id_major_version cannot
833 * reliably report on drives below ATA3.
834 */
835
ata_id_major_version(const u16 * id)836 static inline unsigned int ata_id_major_version(const u16 *id)
837 {
838 unsigned int mver;
839
840 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
841 return 0;
842
843 for (mver = 14; mver >= 1; mver--)
844 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
845 break;
846 return mver;
847 }
848
ata_id_is_sata(const u16 * id)849 static inline bool ata_id_is_sata(const u16 *id)
850 {
851 /*
852 * See if word 93 is 0 AND drive is at least ATA-5 compatible
853 * verifying that word 80 by casting it to a signed type --
854 * this trick allows us to filter out the reserved values of
855 * 0x0000 and 0xffff along with the earlier ATA revisions...
856 */
857 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
858 return true;
859 return false;
860 }
861
ata_id_has_tpm(const u16 * id)862 static inline bool ata_id_has_tpm(const u16 *id)
863 {
864 /* The TPM bits are only valid on ATA8 */
865 if (ata_id_major_version(id) < 8)
866 return false;
867 if ((id[48] & 0xC000) != 0x4000)
868 return false;
869 return id[48] & (1 << 0);
870 }
871
ata_id_has_dword_io(const u16 * id)872 static inline bool ata_id_has_dword_io(const u16 *id)
873 {
874 /* ATA 8 reuses this flag for "trusted" computing */
875 if (ata_id_major_version(id) > 7)
876 return false;
877 return id[ATA_ID_DWORD_IO] & (1 << 0);
878 }
879
ata_id_has_trusted(const u16 * id)880 static inline bool ata_id_has_trusted(const u16 *id)
881 {
882 if (ata_id_major_version(id) <= 7)
883 return false;
884 return id[ATA_ID_TRUSTED] & (1 << 0);
885 }
886
ata_id_has_unload(const u16 * id)887 static inline bool ata_id_has_unload(const u16 *id)
888 {
889 if (ata_id_major_version(id) >= 7 &&
890 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
891 id[ATA_ID_CFSSE] & (1 << 13))
892 return true;
893 return false;
894 }
895
ata_id_has_wwn(const u16 * id)896 static inline bool ata_id_has_wwn(const u16 *id)
897 {
898 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
899 }
900
ata_id_form_factor(const u16 * id)901 static inline int ata_id_form_factor(const u16 *id)
902 {
903 u16 val = id[168];
904
905 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
906 return 0;
907
908 val &= 0xf;
909
910 if (val > 5)
911 return 0;
912
913 return val;
914 }
915
ata_id_rotation_rate(const u16 * id)916 static inline int ata_id_rotation_rate(const u16 *id)
917 {
918 u16 val = id[217];
919
920 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
921 return 0;
922
923 if (val > 1 && val < 0x401)
924 return 0;
925
926 return val;
927 }
928
ata_id_has_ncq_send_and_recv(const u16 * id)929 static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
930 {
931 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
932 }
933
ata_id_has_ncq_non_data(const u16 * id)934 static inline bool ata_id_has_ncq_non_data(const u16 *id)
935 {
936 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5);
937 }
938
ata_id_has_ncq_prio(const u16 * id)939 static inline bool ata_id_has_ncq_prio(const u16 *id)
940 {
941 return id[ATA_ID_SATA_CAPABILITY] & BIT(12);
942 }
943
ata_id_has_trim(const u16 * id)944 static inline bool ata_id_has_trim(const u16 *id)
945 {
946 if (ata_id_major_version(id) >= 7 &&
947 (id[ATA_ID_DATA_SET_MGMT] & 1))
948 return true;
949 return false;
950 }
951
ata_id_has_zero_after_trim(const u16 * id)952 static inline bool ata_id_has_zero_after_trim(const u16 *id)
953 {
954 /* DSM supported, deterministic read, and read zero after trim set */
955 if (ata_id_has_trim(id) &&
956 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
957 return true;
958
959 return false;
960 }
961
ata_id_current_chs_valid(const u16 * id)962 static inline bool ata_id_current_chs_valid(const u16 *id)
963 {
964 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
965 has not been issued to the device then the values of
966 id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
967 return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
968 id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */
969 id[ATA_ID_CUR_HEADS] && /* heads in current translation */
970 id[ATA_ID_CUR_HEADS] <= 16 &&
971 id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */
972 }
973
ata_id_is_cfa(const u16 * id)974 static inline bool ata_id_is_cfa(const u16 *id)
975 {
976 if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */
977 (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */
978 return true;
979 /*
980 * CF specs don't require specific value in the word 0 anymore and yet
981 * they forbid to report the ATA version in the word 80 and require the
982 * CFA feature set support to be indicated in the word 83 in this case.
983 * Unfortunately, some cards only follow either of this requirements,
984 * and while those that don't indicate CFA feature support need some
985 * sort of quirk list, it seems impractical for the ones that do...
986 */
987 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
988 }
989
ata_id_is_ssd(const u16 * id)990 static inline bool ata_id_is_ssd(const u16 *id)
991 {
992 return id[ATA_ID_ROT_SPEED] == 0x01;
993 }
994
ata_id_zoned_cap(const u16 * id)995 static inline u8 ata_id_zoned_cap(const u16 *id)
996 {
997 return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3);
998 }
999
ata_id_pio_need_iordy(const u16 * id,const u8 pio)1000 static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
1001 {
1002 /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
1003 if (pio > 4 && ata_id_is_cfa(id))
1004 return false;
1005 /* For PIO3 and higher it is mandatory. */
1006 if (pio > 2)
1007 return true;
1008 /* Turn it on when possible. */
1009 return ata_id_has_iordy(id);
1010 }
1011
ata_drive_40wire(const u16 * dev_id)1012 static inline bool ata_drive_40wire(const u16 *dev_id)
1013 {
1014 if (ata_id_is_sata(dev_id))
1015 return false; /* SATA */
1016 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
1017 return false; /* 80 wire */
1018 return true;
1019 }
1020
ata_drive_40wire_relaxed(const u16 * dev_id)1021 static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
1022 {
1023 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
1024 return false; /* 80 wire */
1025 return true;
1026 }
1027
atapi_cdb_len(const u16 * dev_id)1028 static inline int atapi_cdb_len(const u16 *dev_id)
1029 {
1030 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
1031 switch (tmp) {
1032 case 0: return 12;
1033 case 1: return 16;
1034 default: return -1;
1035 }
1036 }
1037
atapi_command_packet_set(const u16 * dev_id)1038 static inline int atapi_command_packet_set(const u16 *dev_id)
1039 {
1040 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
1041 }
1042
atapi_id_dmadir(const u16 * dev_id)1043 static inline bool atapi_id_dmadir(const u16 *dev_id)
1044 {
1045 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
1046 }
1047
1048 /*
1049 * ata_id_is_lba_capacity_ok() performs a sanity check on
1050 * the claimed LBA capacity value for the device.
1051 *
1052 * Returns 1 if LBA capacity looks sensible, 0 otherwise.
1053 *
1054 * It is called only once for each device.
1055 */
ata_id_is_lba_capacity_ok(u16 * id)1056 static inline bool ata_id_is_lba_capacity_ok(u16 *id)
1057 {
1058 unsigned long lba_sects, chs_sects, head, tail;
1059
1060 /* No non-LBA info .. so valid! */
1061 if (id[ATA_ID_CYLS] == 0)
1062 return true;
1063
1064 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1065
1066 /*
1067 * The ATA spec tells large drives to return
1068 * C/H/S = 16383/16/63 independent of their size.
1069 * Some drives can be jumpered to use 15 heads instead of 16.
1070 * Some drives can be jumpered to use 4092 cyls instead of 16383.
1071 */
1072 if ((id[ATA_ID_CYLS] == 16383 ||
1073 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
1074 id[ATA_ID_SECTORS] == 63 &&
1075 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
1076 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
1077 return true;
1078
1079 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
1080
1081 /* perform a rough sanity check on lba_sects: within 10% is OK */
1082 if (lba_sects - chs_sects < chs_sects/10)
1083 return true;
1084
1085 /* some drives have the word order reversed */
1086 head = (lba_sects >> 16) & 0xffff;
1087 tail = lba_sects & 0xffff;
1088 lba_sects = head | (tail << 16);
1089
1090 if (lba_sects - chs_sects < chs_sects/10) {
1091 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
1092 return true; /* LBA capacity is (now) good */
1093 }
1094
1095 return false; /* LBA capacity value may be bad */
1096 }
1097
ata_id_to_hd_driveid(u16 * id)1098 static inline void ata_id_to_hd_driveid(u16 *id)
1099 {
1100 #ifdef __BIG_ENDIAN
1101 /* accessed in struct hd_driveid as 8-bit values */
1102 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
1103 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
1104 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
1105 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
1106 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
1107
1108 /* as 32-bit values */
1109 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1110 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
1111
1112 /* as 64-bit value */
1113 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
1114 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1115 #endif
1116 }
1117
ata_ok(u8 status)1118 static inline bool ata_ok(u8 status)
1119 {
1120 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1121 == ATA_DRDY);
1122 }
1123
lba_28_ok(u64 block,u32 n_block)1124 static inline bool lba_28_ok(u64 block, u32 n_block)
1125 {
1126 /* check the ending block number: must be LESS THAN 0x0fffffff */
1127 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= ATA_MAX_SECTORS);
1128 }
1129
lba_48_ok(u64 block,u32 n_block)1130 static inline bool lba_48_ok(u64 block, u32 n_block)
1131 {
1132 /* check the ending block number */
1133 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= ATA_MAX_SECTORS_LBA48);
1134 }
1135
1136 #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1137 #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1138 #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1139 #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1140
1141 #endif /* __LINUX_ATA_H__ */
1142