1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2003
4 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
5 *
6 * (C) Copyright 2002
7 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
8 */
9
10 /*
11 * Altera FPGA support
12 */
13 #include <common.h>
14 #include <errno.h>
15 #include <ACEX1K.h>
16 #include <log.h>
17 #include <stratixII.h>
18
19 /* Define FPGA_DEBUG to 1 to get debug printf's */
20 #define FPGA_DEBUG 0
21
22 static const struct altera_fpga {
23 enum altera_family family;
24 const char *name;
25 int (*load)(Altera_desc *, const void *, size_t);
26 int (*dump)(Altera_desc *, const void *, size_t);
27 int (*info)(Altera_desc *);
28 } altera_fpga[] = {
29 #if defined(CONFIG_FPGA_ACEX1K)
30 { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
31 { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
32 #elif defined(CONFIG_FPGA_CYCLON2)
33 { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
34 { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
35 #endif
36 #if defined(CONFIG_FPGA_STRATIX_II)
37 { Altera_StratixII, "StratixII", StratixII_load,
38 StratixII_dump, StratixII_info },
39 #endif
40 #if defined(CONFIG_FPGA_STRATIX_V)
41 { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
42 #endif
43 #if defined(CONFIG_FPGA_SOCFPGA)
44 { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
45 #endif
46 #if defined(CONFIG_FPGA_INTEL_SDM_MAILBOX)
47 { Intel_FPGA_SDM_Mailbox, "Intel SDM Mailbox", intel_sdm_mb_load, NULL,
48 NULL },
49 #endif
50 };
51
altera_validate(Altera_desc * desc,const char * fn)52 static int altera_validate(Altera_desc *desc, const char *fn)
53 {
54 if (!desc) {
55 printf("%s: NULL descriptor!\n", fn);
56 return -EINVAL;
57 }
58
59 if ((desc->family < min_altera_type) ||
60 (desc->family > max_altera_type)) {
61 printf("%s: Invalid family type, %d\n", fn, desc->family);
62 return -EINVAL;
63 }
64
65 if ((desc->iface < min_altera_iface_type) ||
66 (desc->iface > max_altera_iface_type)) {
67 printf("%s: Invalid Interface type, %d\n", fn, desc->iface);
68 return -EINVAL;
69 }
70
71 if (!desc->size) {
72 printf("%s: NULL part size\n", fn);
73 return -EINVAL;
74 }
75
76 return 0;
77 }
78
79 static const struct altera_fpga *
altera_desc_to_fpga(Altera_desc * desc,const char * fn)80 altera_desc_to_fpga(Altera_desc *desc, const char *fn)
81 {
82 int i;
83
84 if (altera_validate(desc, fn)) {
85 printf("%s: Invalid device descriptor\n", fn);
86 return NULL;
87 }
88
89 for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) {
90 if (desc->family == altera_fpga[i].family)
91 break;
92 }
93
94 if (i == ARRAY_SIZE(altera_fpga)) {
95 printf("%s: Unsupported family type, %d\n", fn, desc->family);
96 return NULL;
97 }
98
99 return &altera_fpga[i];
100 }
101
altera_load(Altera_desc * desc,const void * buf,size_t bsize)102 int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
103 {
104 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
105
106 if (!fpga)
107 return FPGA_FAIL;
108
109 debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
110 __func__, fpga->name);
111 if (fpga->load)
112 return fpga->load(desc, buf, bsize);
113 return 0;
114 }
115
altera_dump(Altera_desc * desc,const void * buf,size_t bsize)116 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
117 {
118 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
119
120 if (!fpga)
121 return FPGA_FAIL;
122
123 debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
124 __func__, fpga->name);
125 if (fpga->dump)
126 return fpga->dump(desc, buf, bsize);
127 return 0;
128 }
129
altera_info(Altera_desc * desc)130 int altera_info(Altera_desc *desc)
131 {
132 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
133
134 if (!fpga)
135 return FPGA_FAIL;
136
137 printf("Family: \t%s\n", fpga->name);
138
139 printf("Interface type:\t");
140 switch (desc->iface) {
141 case passive_serial:
142 printf("Passive Serial (PS)\n");
143 break;
144 case passive_parallel_synchronous:
145 printf("Passive Parallel Synchronous (PPS)\n");
146 break;
147 case passive_parallel_asynchronous:
148 printf("Passive Parallel Asynchronous (PPA)\n");
149 break;
150 case passive_serial_asynchronous:
151 printf("Passive Serial Asynchronous (PSA)\n");
152 break;
153 case altera_jtag_mode: /* Not used */
154 printf("JTAG Mode\n");
155 break;
156 case fast_passive_parallel:
157 printf("Fast Passive Parallel (FPP)\n");
158 break;
159 case fast_passive_parallel_security:
160 printf("Fast Passive Parallel with Security (FPPS)\n");
161 break;
162 case secure_device_manager_mailbox:
163 puts("Secure Device Manager (SDM) Mailbox\n");
164 break;
165 /* Add new interface types here */
166 default:
167 printf("Unsupported interface type, %d\n", desc->iface);
168 }
169
170 printf("Device Size: \t%zd bytes\n"
171 "Cookie: \t0x%x (%d)\n",
172 desc->size, desc->cookie, desc->cookie);
173
174 if (desc->iface_fns) {
175 printf("Device Function Table @ 0x%p\n", desc->iface_fns);
176 if (fpga->info)
177 fpga->info(desc);
178 } else {
179 printf("No Device Function Table.\n");
180 }
181
182 return FPGA_SUCCESS;
183 }
184