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/linux/drivers/net/wireless/quantenna/qtnfmac/pcie/
A Dpearl_pcie_regs.h8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
21 #define PCIE_HDP_INT_EN(base) ((base) + 0x2c3c) argument
35 #define PCIE_HDP_CFG0(base) ((base) + 0x2c80) argument
36 #define PCIE_HDP_CFG1(base) ((base) + 0x2c84) argument
37 #define PCIE_HDP_CFG2(base) ((base) + 0x2c88) argument
38 #define PCIE_HDP_CFG3(base) ((base) + 0x2c8c) argument
39 #define PCIE_HDP_CFG4(base) ((base) + 0x2c90) argument
47 #define PCIE_INT(base) ((base) + 0x2cb0) argument
51 #define PCIE_PRI_CFG(base) ((base) + 0x2cc0) argument
[all …]
A Dtopaz_pcie_regs.h8 #define PCIE_DMA_WR_INTR_STATUS(base) ((base) + 0x9bc) argument
9 #define PCIE_DMA_WR_INTR_MASK(base) ((base) + 0x9c4) argument
10 #define PCIE_DMA_WR_INTR_CLR(base) ((base) + 0x9c8) argument
11 #define PCIE_DMA_WR_ERR_STATUS(base) ((base) + 0x9cc) argument
15 #define PCIE_DMA_RD_INTR_STATUS(base) ((base) + 0x310) argument
16 #define PCIE_DMA_RD_INTR_MASK(base) ((base) + 0x319) argument
17 #define PCIE_DMA_RD_INTR_CLR(base) ((base) + 0x31c) argument
24 #define TOPAZ_LH_IPC4_INT(base) ((base) + 0x13C) argument
25 #define TOPAZ_LH_IPC4_INT_MASK(base) ((base) + 0x140) argument
34 #define TOPAZ_CTL_M2L_INT(base) ((base) + 0x2C) argument
[all …]
/linux/drivers/gpu/drm/sun4i/
A Dsun8i_vi_scaler.h30 #define SUN8I_SCALER_VSU_CTRL(base) ((base) + 0x0) argument
32 #define SUN50I_SCALER_VSU_DIR_THR(base) ((base) + 0x20) argument
36 #define SUN8I_SCALER_VSU_OUTSIZE(base) ((base) + 0x40) argument
37 #define SUN8I_SCALER_VSU_YINSIZE(base) ((base) + 0x80) argument
38 #define SUN8I_SCALER_VSU_YHSTEP(base) ((base) + 0x88) argument
39 #define SUN8I_SCALER_VSU_YVSTEP(base) ((base) + 0x8c) argument
40 #define SUN8I_SCALER_VSU_YHPHASE(base) ((base) + 0x90) argument
41 #define SUN8I_SCALER_VSU_YVPHASE(base) ((base) + 0x98) argument
42 #define SUN8I_SCALER_VSU_CINSIZE(base) ((base) + 0xc0) argument
43 #define SUN8I_SCALER_VSU_CHSTEP(base) ((base) + 0xc8) argument
[all …]
A Dsun8i_ui_layer.h17 #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(base, layer) \ argument
19 #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(base, layer) \ argument
21 #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(base, layer) \ argument
23 #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(base, layer) \ argument
25 #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(base, layer) \ argument
27 #define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(base, layer) \ argument
29 #define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(base, layer) \ argument
31 #define SUN8I_MIXER_CHAN_UI_TOP_HADDR(base) \ argument
33 #define SUN8I_MIXER_CHAN_UI_BOT_HADDR(base) \ argument
35 #define SUN8I_MIXER_CHAN_UI_OVL_SIZE(base) \ argument
A Dsun8i_ui_scaler.h26 #define SUN8I_SCALER_GSU_CTRL(base) ((base) + 0x0) argument
27 #define SUN8I_SCALER_GSU_OUTSIZE(base) ((base) + 0x40) argument
28 #define SUN8I_SCALER_GSU_INSIZE(base) ((base) + 0x80) argument
29 #define SUN8I_SCALER_GSU_HSTEP(base) ((base) + 0x88) argument
30 #define SUN8I_SCALER_GSU_VSTEP(base) ((base) + 0x8c) argument
31 #define SUN8I_SCALER_GSU_HPHASE(base) ((base) + 0x90) argument
32 #define SUN8I_SCALER_GSU_VPHASE(base) ((base) + 0x98) argument
33 #define SUN8I_SCALER_GSU_HCOEFF(base, index) ((base) + 0x200 + 0x4 * (index)) argument
A Dsun8i_vi_layer.h11 #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \ argument
13 #define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \ argument
15 #define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \ argument
17 #define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \ argument
19 #define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \ argument
21 #define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \ argument
23 #define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \ argument
25 #define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \ argument
27 #define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \ argument
29 #define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \ argument
/linux/drivers/media/platform/s5p-jpeg/
A Djpeg-hw-exynos4.c16 void exynos4_jpeg_sw_reset(void __iomem *base) in exynos4_jpeg_sw_reset()
183 unsigned int exynos4_jpeg_get_int_status(void __iomem *base) in exynos4_jpeg_get_int_status()
188 unsigned int exynos4_jpeg_get_fifo_status(void __iomem *base) in exynos4_jpeg_get_fifo_status()
219 void exynos4_jpeg_set_stream_buf_address(void __iomem *base, in exynos4_jpeg_set_stream_buf_address()
225 void exynos4_jpeg_set_stream_size(void __iomem *base, in exynos4_jpeg_set_stream_size()
233 void exynos4_jpeg_set_frame_buf_address(void __iomem *base, in exynos4_jpeg_set_frame_buf_address()
241 void exynos4_jpeg_set_encode_tbl_select(void __iomem *base, in exynos4_jpeg_set_encode_tbl_select()
255 void exynos4_jpeg_set_dec_components(void __iomem *base, int n) in exynos4_jpeg_set_dec_components()
293 unsigned int exynos4_jpeg_get_stream_size(void __iomem *base) in exynos4_jpeg_get_stream_size()
303 void exynos4_jpeg_get_frame_size(void __iomem *base, in exynos4_jpeg_get_frame_size()
[all …]
/linux/drivers/scsi/
A Dnsp32_io.h12 static inline void nsp32_write1(unsigned int base, in nsp32_write1()
19 static inline unsigned char nsp32_read1(unsigned int base, in nsp32_read1()
25 static inline void nsp32_write2(unsigned int base, in nsp32_write2()
32 static inline unsigned short nsp32_read2(unsigned int base, in nsp32_read2()
38 static inline void nsp32_write4(unsigned int base, in nsp32_write4()
45 static inline unsigned long nsp32_read4(unsigned int base, in nsp32_read4()
53 static inline void nsp32_mmio_write1(unsigned long base, in nsp32_mmio_write1()
74 static inline void nsp32_mmio_write2(unsigned long base, in nsp32_mmio_write2()
95 static inline void nsp32_mmio_write4(unsigned long base, in nsp32_mmio_write4()
125 static inline void nsp32_index_write1(unsigned int base, in nsp32_index_write1()
[all …]
A Daha1740.h19 #define HID0(base) (base + 0x0) argument
20 #define HID1(base) (base + 0x1) argument
21 #define HID2(base) (base + 0x2) argument
22 #define HID3(base) (base + 0x3) argument
23 #define EBCNTRL(base) (base + 0x4) argument
24 #define PORTADR(base) (base + 0x40) argument
26 #define INTDEF(base) (base + 0x42) argument
28 #define BUSDEF(base) (base + 0x44) argument
29 #define RESV0(base) (base + 0x45) argument
30 #define RESV1(base) (base + 0x46) argument
[all …]
A Dmyrb.c165 void __iomem *base = cb->io_base; in myrb_qcmd() local
808 void __iomem *base = cb->io_base; in myrb_enable_mmio() local
2667 struct myrb_hba *cb, void __iomem *base) in DAC960_LA_hw_init()
2711 void __iomem *base = cb->io_base; in DAC960_LA_intr_handler() local
2853 DAC960_PG_read_status(void __iomem *base) in DAC960_PG_read_status()
2959 void __iomem *base = cb->io_base; in DAC960_PG_intr_handler() local
3078 DAC960_PD_read_status(void __iomem *base) in DAC960_PD_read_status()
3101 void __iomem *base = cb->io_base; in DAC960_PD_qcmd() local
3155 void __iomem *base = cb->io_base; in DAC960_PD_intr_handler() local
3240 void __iomem *base = cb->io_base; in DAC960_P_qcmd() local
[all …]
A Dmyrs.c106 void __iomem *base = cs->io_base; in myrs_qcmd() local
484 void __iomem *base = cs->io_base; in myrs_enable_mmio_mbox() local
2450 static inline void DAC960_GEM_ack_intr(void __iomem *base) in DAC960_GEM_ack_intr()
2538 struct myrs_hba *cs, void __iomem *base) in DAC960_GEM_hw_init()
2577 void __iomem *base = cs->io_base; in DAC960_GEM_intr_handler() local
2673 static inline void DAC960_BA_ack_intr(void __iomem *base) in DAC960_BA_ack_intr()
2757 struct myrs_hba *cs, void __iomem *base) in DAC960_BA_hw_init()
2796 void __iomem *base = cs->io_base; in DAC960_BA_intr_handler() local
2892 static inline void DAC960_LP_ack_intr(void __iomem *base) in DAC960_LP_ack_intr()
2975 struct myrs_hba *cs, void __iomem *base) in DAC960_LP_hw_init()
[all …]
/linux/drivers/media/platform/mtk-jpeg/
A Dmtk_jpeg_dec_hw.c192 u32 mtk_jpeg_dec_get_int_status(void __iomem *base) in mtk_jpeg_dec_get_int_status()
219 void mtk_jpeg_dec_start(void __iomem *base) in mtk_jpeg_dec_start()
224 static void mtk_jpeg_dec_soft_reset(void __iomem *base) in mtk_jpeg_dec_soft_reset()
231 static void mtk_jpeg_dec_hard_reset(void __iomem *base) in mtk_jpeg_dec_hard_reset()
237 void mtk_jpeg_dec_reset(void __iomem *base) in mtk_jpeg_dec_reset()
253 static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, u32 addr_y, in mtk_jpeg_dec_set_dst_bank0()
264 static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, u32 addr_y, in mtk_jpeg_dec_set_dst_bank1()
291 static void mtk_jpeg_dec_set_dec_mode(void __iomem *base, u32 mode) in mtk_jpeg_dec_set_dec_mode()
320 static void mtk_jpeg_dec_set_total_mcu(void __iomem *base, u32 num) in mtk_jpeg_dec_set_total_mcu()
325 static void mtk_jpeg_dec_set_comp0_du(void __iomem *base, u32 num) in mtk_jpeg_dec_set_comp0_du()
[all …]
/linux/include/linux/
A Dkstrtox.h30 static inline int __must_check kstrtoul(const char *s, unsigned int base, unsigned long *res) in kstrtoul()
58 static inline int __must_check kstrtol(const char *s, unsigned int base, long *res) in kstrtol()
74 static inline int __must_check kstrtou64(const char *s, unsigned int base, u64 *res) in kstrtou64()
79 static inline int __must_check kstrtos64(const char *s, unsigned int base, s64 *res) in kstrtos64()
84 static inline int __must_check kstrtou32(const char *s, unsigned int base, u32 *res) in kstrtou32()
89 static inline int __must_check kstrtos32(const char *s, unsigned int base, s32 *res) in kstrtos32()
112 …t __must_check kstrtou64_from_user(const char __user *s, size_t count, unsigned int base, u64 *res) in kstrtou64_from_user()
117 …t __must_check kstrtos64_from_user(const char __user *s, size_t count, unsigned int base, s64 *res) in kstrtos64_from_user()
122 …t __must_check kstrtou32_from_user(const char __user *s, size_t count, unsigned int base, u32 *res) in kstrtou32_from_user()
127 …t __must_check kstrtos32_from_user(const char __user *s, size_t count, unsigned int base, s32 *res) in kstrtos32_from_user()
/linux/arch/arm/mm/
A Dcache-l2x0.c134 void __iomem *base = l2x0_base; in l2c_disable() local
150 void __iomem *base = l2x0_base; in l2c_resume() local
189 void __iomem *base = l2x0_base; in l2c210_inv_range() local
208 void __iomem *base = l2x0_base; in l2c210_clean_range() local
217 void __iomem *base = l2x0_base; in l2c210_flush_range() local
226 void __iomem *base = l2x0_base; in l2c210_flush_all() local
309 void __iomem *base = l2x0_base; in l2c220_inv_range() local
336 void __iomem *base = l2x0_base; in l2c220_clean_range() local
355 void __iomem *base = l2x0_base; in l2c220_flush_range() local
469 void __iomem *base = l2x0_base; in l2c310_inv_range_erratum() local
[all …]
/linux/lib/
A Dkstrtox.c25 const char *_parse_integer_fixup_radix(const char *s, unsigned int *base) in _parse_integer_fixup_radix()
128 int kstrtoull(const char *s, unsigned int base, unsigned long long *res) in kstrtoull()
151 int kstrtoll(const char *s, unsigned int base, long long *res) in kstrtoll()
176 int _kstrtoul(const char *s, unsigned int base, unsigned long *res) in _kstrtoul()
192 int _kstrtol(const char *s, unsigned int base, long *res) in _kstrtol()
222 int kstrtouint(const char *s, unsigned int base, unsigned int *res) in kstrtouint()
252 int kstrtoint(const char *s, unsigned int base, int *res) in kstrtoint()
267 int kstrtou16(const char *s, unsigned int base, u16 *res) in kstrtou16()
282 int kstrtos16(const char *s, unsigned int base, s16 *res) in kstrtos16()
297 int kstrtou8(const char *s, unsigned int base, u8 *res) in kstrtou8()
[all …]
/linux/drivers/scsi/pcmcia/
A Dnsp_io.h30 static inline void nsp_write(unsigned int base, in nsp_write()
37 static inline unsigned char nsp_read(unsigned int base, in nsp_read()
75 static inline void nsp_fifo8_read(unsigned int base, in nsp_fifo8_read()
94 static inline void nsp_fifo16_read(unsigned int base, in nsp_fifo16_read()
113 static inline void nsp_fifo32_read(unsigned int base, in nsp_fifo32_read()
132 static inline void nsp_fifo8_write(unsigned int base, in nsp_fifo8_write()
150 static inline void nsp_fifo16_write(unsigned int base, in nsp_fifo16_write()
168 static inline void nsp_fifo32_write(unsigned int base, in nsp_fifo32_write()
178 static inline void nsp_mmio_write(unsigned long base, in nsp_mmio_write()
207 static inline void nsp_mmio_index_write(unsigned long base, in nsp_mmio_index_write()
[all …]
/linux/arch/powerpc/boot/
A Dcrt0.S229 #define SAVE_GPR(n, base) std n,8*(n)(base) argument
230 #define REST_GPR(n, base) ld n,8*(n)(base) argument
231 #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) argument
232 #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) argument
233 #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) argument
234 #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) argument
235 #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) argument
236 #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) argument
237 #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) argument
238 #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) argument
/linux/drivers/i3c/master/mipi-i3c-hci/
A Dext_caps.c24 static int hci_extcap_hardware_id(struct i3c_hci *hci, void __iomem *base) in hci_extcap_hardware_id()
45 static int hci_extcap_master_config(struct i3c_hci *hci, void __iomem *base) in hci_extcap_master_config()
59 static int hci_extcap_multi_bus(struct i3c_hci *hci, void __iomem *base) in hci_extcap_multi_bus()
68 static int hci_extcap_xfer_modes(struct i3c_hci *hci, void __iomem *base) in hci_extcap_xfer_modes()
88 static int hci_extcap_xfer_rates(struct i3c_hci *hci, void __iomem *base) in hci_extcap_xfer_rates()
116 static int hci_extcap_auto_command(struct i3c_hci *hci, void __iomem *base) in hci_extcap_auto_command()
130 static int hci_extcap_debug(struct i3c_hci *hci, void __iomem *base) in hci_extcap_debug()
137 static int hci_extcap_scheduled_cmd(struct i3c_hci *hci, void __iomem *base) in hci_extcap_scheduled_cmd()
157 static int hci_extcap_global_DAT(struct i3c_hci *hci, void __iomem *base) in hci_extcap_global_DAT()
163 static int hci_extcap_multilane(struct i3c_hci *hci, void __iomem *base) in hci_extcap_multilane()
[all …]
/linux/tools/testing/selftests/powerpc/primitives/asm/
A Dppc_asm.h24 #define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) argument
25 #define REST_GPR(n, base) ld n,GPR0+8*(n)(base) argument
29 #define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) argument
30 #define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) argument
50 #define REST_FPR(n, base) lfd n,8*TS_FPRWIDTH*(n)(base) argument
57 #define SAVE_VR(n,b,base) li b,16*(n); stvx n,base,b argument
63 #define REST_VR(n,b,base) li b,16*(n); lvx n,base,b argument
71 #define STXVD2X_ROT(n,b,base) STXVD2X(n,b,base) argument
72 #define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base) argument
74 #define STXVD2X_ROT(n,b,base) XXSWAPD(n,n); \ argument
[all …]
/linux/arch/powerpc/include/asm/
A Dppc_asm.h24 #define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) argument
25 #define REST_GPR(n, base) ld n,GPR0+8*(n)(base) argument
29 #define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) argument
30 #define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) argument
50 #define REST_FPR(n, base) lfd n,8*TS_FPRWIDTH*(n)(base) argument
57 #define SAVE_VR(n,b,base) li b,16*(n); stvx n,base,b argument
63 #define REST_VR(n,b,base) li b,16*(n); lvx n,base,b argument
71 #define STXVD2X_ROT(n,b,base) STXVD2X(n,b,base) argument
72 #define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base) argument
74 #define STXVD2X_ROT(n,b,base) XXSWAPD(n,n); \ argument
[all …]
/linux/drivers/s390/block/
A Ddasd_ioctl.c47 struct dasd_device *base; in dasd_ioctl_enable() local
68 struct dasd_device *base; in dasd_ioctl_disable() local
100 struct dasd_device *base; in dasd_ioctl_quiesce() local
121 struct dasd_device *base; in dasd_ioctl_resume() local
143 struct dasd_device *base; in dasd_ioctl_abortio() local
178 struct dasd_device *base; in dasd_ioctl_allowio() local
199 struct dasd_device *base; in dasd_format() local
237 struct dasd_device *base; in dasd_check_format() local
257 struct dasd_device *base; in dasd_ioctl_format() local
295 struct dasd_device *base; in dasd_ioctl_check_format() local
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/
A Dnv50.c32 nv50_bar_flush(struct nvkm_bar *base) in nv50_bar_flush()
47 nv50_bar_bar1_vmm(struct nvkm_bar *base) in nv50_bar_bar1_vmm()
53 nv50_bar_bar1_wait(struct nvkm_bar *base) in nv50_bar_bar1_wait()
65 nv50_bar_bar1_init(struct nvkm_bar *base) in nv50_bar_bar1_init()
73 nv50_bar_bar2_vmm(struct nvkm_bar *base) in nv50_bar_bar2_vmm()
85 nv50_bar_bar2_init(struct nvkm_bar *base) in nv50_bar_bar2_init()
95 nv50_bar_init(struct nvkm_bar *base) in nv50_bar_init()
106 nv50_bar_oneinit(struct nvkm_bar *base) in nv50_bar_oneinit()
204 nv50_bar_dtor(struct nvkm_bar *base) in nv50_bar_dtor()
/linux/arch/mips/alchemy/common/
A Dusb.c98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl()
204 static inline void __au1300_udc_control(void __iomem *base, int enable) in __au1300_udc_control()
267 void __iomem *base = in au1300_usb_control() local
295 void __iomem *base = in au1300_usb_init() local
362 void __iomem *base = in au1200_usb_control() local
385 void __iomem *base = in au1200_usb_init() local
394 void __iomem *base = (void __iomem *)KSEG1ADDR(rb + reg); in au1000_usb_init() local
427 void __iomem *base = (void __iomem *)KSEG1ADDR(rb); in __au1xx0_ohci_control() local
514 void __iomem *base = (void __iomem *)KSEG1ADDR(br); in au1000_usb_pm() local
531 void __iomem *base = in au1200_usb_pm() local
[all …]
/linux/arch/arm/plat-orion/
A Dpcie.c55 u32 orion_pcie_dev_id(void __iomem *base) in orion_pcie_dev_id()
60 u32 orion_pcie_rev(void __iomem *base) in orion_pcie_rev()
65 int orion_pcie_link_up(void __iomem *base) in orion_pcie_link_up()
70 int __init orion_pcie_x4_mode(void __iomem *base) in orion_pcie_x4_mode()
75 int orion_pcie_get_local_bus_nr(void __iomem *base) in orion_pcie_get_local_bus_nr()
82 void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr) in orion_pcie_set_local_bus_nr()
92 void __init orion_pcie_reset(void __iomem *base) in orion_pcie_reset()
123 static void __init orion_pcie_setup_wins(void __iomem *base) in orion_pcie_setup_wins()
181 void __init orion_pcie_setup(void __iomem *base) in orion_pcie_setup()
208 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, in orion_pcie_rd_conf()
[all …]
/linux/arch/powerpc/kernel/
A Dfpu.S26 #define __REST_32FPVSRS(n,c,base) \ argument
35 #define __SAVE_32FPVSRS(n,c,base) \ argument
44 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) argument
45 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) argument
47 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) argument
48 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) argument

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