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Searched defs:clk_domains (Results 1 – 9 of 9) sorted by relevance

/u-boot/arch/arm/mach-omap2/am33xx/
A Dclock_am43xx.c78 u32 *const clk_domains[] = { in enable_basic_clocks() local
128 u32 *const clk_domains[] = { in rtc_only_enable_basic_clocks() local
A Dclock.c191 void do_enable_clocks(u32 *const *clk_domains, in do_enable_clocks()
211 void do_disable_clocks(u32 *const *clk_domains, in do_disable_clocks()
A Dclock_am33xx.c193 u32 *const clk_domains[] = { in enable_basic_clocks() local
/u-boot/board/BuR/brppt1/
A Dboard.c98 u32 *const clk_domains[] = { in am33xx_spl_board_init() local
/u-boot/board/BuR/brsmarc1/
A Dboard.c86 u32 *const clk_domains[] = { 0 }; in am33xx_spl_board_init() local
/u-boot/board/BuR/brxre1/
A Dboard.c93 u32 *const clk_domains[] = { 0 }; in am33xx_spl_board_init() local
/u-boot/board/siemens/pxm2/
A Dboard.c401 u32 *const clk_domains[] = { in conf_disp_pll() local
/u-boot/arch/arm/mach-omap2/
A Dclocks-common.c825 void do_enable_clocks(u32 const *clk_domains, in do_enable_clocks()
861 void do_disable_clocks(u32 const *clk_domains, in do_disable_clocks()
/u-boot/board/siemens/rut/
A Dboard.c388 u32 *const clk_domains[] = { in conf_disp_pll() local

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