1 /*
2  * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef COREBOOT_H
8 #define COREBOOT_H
9 
10 #include <stdint.h>
11 
12 typedef struct {
13 	uint32_t type;			/* always 2 (memory-mapped) on ARM */
14 	uint32_t baseaddr;
15 	uint32_t baud;
16 	uint32_t regwidth;		/* in bytes, i.e. usually 4 */
17 	uint32_t input_hertz;
18 	uint32_t uart_pci_addr;		/* unused on current ARM systems */
19 } coreboot_serial_t;
20 extern coreboot_serial_t coreboot_serial;
21 
22 #define COREBOOT_MAX_MEMRANGES	32	/* libpayload also uses this limit */
23 
24 typedef struct __packed {
25 	uint64_t start;
26 	uint64_t size;
27 	uint32_t type;
28 } coreboot_memrange_t;
29 extern coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES];
30 
31 typedef enum {
32 	CB_MEM_NONE		= 0,	/* coreboot will never report this */
33 	CB_MEM_RAM		= 1,
34 	CB_MEM_RESERVED		= 2,
35 	CB_MEM_ACPI		= 3,
36 	CB_MEM_NVS		= 4,
37 	CB_MEM_UNUSABLE		= 5,
38 	CB_MEM_VENDOR_RSVD	= 6,
39 	CB_MEM_TABLE		= 16,
40 } coreboot_memory_t;
41 
42 coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size);
43 void coreboot_table_setup(void *base);
44 
45 #endif /* COREBOOT_H */
46