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Searched defs:csr_base_addr (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/crypto/qat/qat_common/
A Dadf_gen4_hw_data.c11 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_head()
16 static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring, in write_csr_ring_head()
22 static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_tail()
27 static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring, in write_csr_ring_tail()
33 static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank) in read_csr_e_stat()
44 static void write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring, in write_csr_ring_base()
50 static void write_csr_int_flag(void __iomem *csr_base_addr, u32 bank, in write_csr_int_flag()
56 static void write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank) in write_csr_int_srcsel()
66 static void write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank, in write_csr_int_col_ctl()
72 static void write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank, in write_csr_int_flag_and_col()
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A Dadf_gen4_hw_data.h27 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
31 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
35 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
38 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
42 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument
59 #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \ argument
63 #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \ argument
67 #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \ argument
71 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ argument
75 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ argument
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A Dadf_gen2_hw_data.c161 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_head()
166 static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring, in write_csr_ring_head()
172 static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_tail()
177 static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring, in write_csr_ring_tail()
183 static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank) in read_csr_e_stat()
188 static void write_csr_ring_config(void __iomem *csr_base_addr, u32 bank, in write_csr_ring_config()
205 static void write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank) in write_csr_int_srcsel()
210 static void write_csr_int_col_en(void __iomem *csr_base_addr, u32 bank, in write_csr_int_col_en()
216 static void write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank, in write_csr_int_col_ctl()
222 static void write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank, in write_csr_int_flag_and_col()
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A Dadf_gen2_hw_data.h30 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
33 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
36 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
39 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
42 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument
53 #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \ argument
56 #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \ argument
59 #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \ argument
62 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ argument
69 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ argument
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