1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_DCHUBBUB_H__ 27 #define __DAL_DCHUBBUB_H__ 28 29 30 enum dcc_control { 31 dcc_control__256_256_xxx, 32 dcc_control__128_128_xxx, 33 dcc_control__256_64_64, 34 dcc_control__256_128_128, 35 }; 36 37 enum segment_order { 38 segment_order__na, 39 segment_order__contiguous, 40 segment_order__non_contiguous, 41 }; 42 43 struct dcn_hubbub_wm_set { 44 uint32_t wm_set; 45 uint32_t data_urgent; 46 uint32_t pte_meta_urgent; 47 uint32_t sr_enter; 48 uint32_t sr_exit; 49 uint32_t dram_clk_chanage; 50 }; 51 52 struct dcn_hubbub_wm { 53 struct dcn_hubbub_wm_set sets[4]; 54 }; 55 56 enum dcn_hubbub_page_table_depth { 57 DCN_PAGE_TABLE_DEPTH_1_LEVEL, 58 DCN_PAGE_TABLE_DEPTH_2_LEVEL, 59 DCN_PAGE_TABLE_DEPTH_3_LEVEL, 60 DCN_PAGE_TABLE_DEPTH_4_LEVEL 61 }; 62 63 enum dcn_hubbub_page_table_block_size { 64 DCN_PAGE_TABLE_BLOCK_SIZE_4KB = 0, 65 DCN_PAGE_TABLE_BLOCK_SIZE_64KB = 4, 66 DCN_PAGE_TABLE_BLOCK_SIZE_32KB = 3 67 }; 68 69 struct dcn_hubbub_phys_addr_config { 70 struct { 71 uint64_t fb_top; 72 uint64_t fb_offset; 73 uint64_t fb_base; 74 uint64_t agp_top; 75 uint64_t agp_bot; 76 uint64_t agp_base; 77 } system_aperture; 78 79 struct { 80 uint64_t page_table_start_addr; 81 uint64_t page_table_end_addr; 82 uint64_t page_table_base_addr; 83 } gart_config; 84 85 uint64_t page_table_default_page_addr; 86 }; 87 88 struct dcn_hubbub_virt_addr_config { 89 uint64_t page_table_start_addr; 90 uint64_t page_table_end_addr; 91 enum dcn_hubbub_page_table_block_size page_table_block_size; 92 enum dcn_hubbub_page_table_depth page_table_depth; 93 uint64_t page_table_base_addr; 94 }; 95 96 struct hubbub_addr_config { 97 struct dcn_hubbub_phys_addr_config pa_config; 98 struct dcn_hubbub_virt_addr_config va_config; 99 struct { 100 uint64_t aperture_check_fault; 101 uint64_t generic_fault; 102 } default_addrs; 103 }; 104 105 struct dcn_hubbub_state { 106 uint32_t vm_fault_addr_msb; 107 uint32_t vm_fault_addr_lsb; 108 uint32_t vm_error_status; 109 uint32_t vm_error_vmid; 110 uint32_t vm_error_pipe; 111 uint32_t vm_error_mode; 112 }; 113 114 struct hubbub_funcs { 115 void (*update_dchub)( 116 struct hubbub *hubbub, 117 struct dchub_init_data *dh_data); 118 119 int (*init_dchub_sys_ctx)( 120 struct hubbub *hubbub, 121 struct dcn_hubbub_phys_addr_config *pa_config); 122 void (*init_vm_ctx)( 123 struct hubbub *hubbub, 124 struct dcn_hubbub_virt_addr_config *va_config, 125 int vmid); 126 127 bool (*get_dcc_compression_cap)(struct hubbub *hubbub, 128 const struct dc_dcc_surface_param *input, 129 struct dc_surface_dcc_cap *output); 130 131 bool (*dcc_support_swizzle)( 132 enum swizzle_mode_values swizzle, 133 unsigned int bytes_per_element, 134 enum segment_order *segment_order_horz, 135 enum segment_order *segment_order_vert); 136 137 bool (*dcc_support_pixel_format)( 138 enum surface_pixel_format format, 139 unsigned int *bytes_per_element); 140 141 void (*wm_read_state)(struct hubbub *hubbub, 142 struct dcn_hubbub_wm *wm); 143 144 void (*get_dchub_ref_freq)(struct hubbub *hubbub, 145 unsigned int dccg_ref_freq_inKhz, 146 unsigned int *dchub_ref_freq_inKhz); 147 148 bool (*program_watermarks)( 149 struct hubbub *hubbub, 150 struct dcn_watermark_set *watermarks, 151 unsigned int refclk_mhz, 152 bool safe_to_lower); 153 154 bool (*is_allow_self_refresh_enabled)(struct hubbub *hubbub); 155 void (*allow_self_refresh_control)(struct hubbub *hubbub, bool allow); 156 157 void (*apply_DEDCN21_147_wa)(struct hubbub *hubbub); 158 159 void (*force_wm_propagate_to_pipes)(struct hubbub *hubbub); 160 161 void (*hubbub_read_state)(struct hubbub *hubbub, struct dcn_hubbub_state *hubbub_state); 162 163 void (*force_pstate_change_control)(struct hubbub *hubbub, bool force, bool allow); 164 165 void (*init_watermarks)(struct hubbub *hubbub); 166 void (*program_det_size)(struct hubbub *hubbub, int hubp_inst, unsigned det_buffer_size_in_kbyte); 167 void (*program_compbuf_size)(struct hubbub *hubbub, unsigned compbuf_size_kb, bool safe_to_increase); 168 void (*init_crb)(struct hubbub *hubbub); 169 }; 170 171 struct hubbub { 172 const struct hubbub_funcs *funcs; 173 struct dc_context *ctx; 174 bool riommu_active; 175 }; 176 177 #endif 178