Searched defs:divm (Results 1 – 7 of 7) sorted by relevance
| /u-boot/arch/arm/mach-tegra/ |
| A D | clock.c | 92 int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn, in clock_ll_read_pll()
116 unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn, in clock_start_pll()
539 u32 base, divm; in clock_get_rate() local
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| A D | cpu.c | 172 int pllx_set_rate(struct clk_pll_simple *pll , u32 divn, u32 divm, in pllx_set_rate()
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| /u-boot/arch/arm/include/asm/arch-tegra/ |
| A D | warmboot.h | 71 u32 divm:5; member
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| /u-boot/arch/arm/mach-tegra/tegra20/ |
| A D | warmboot.c | 154 u32 divm, divn, divp, cpcon, lfcon; in warmboot_save_sdram_params() local
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| /u-boot/drivers/clk/ |
| A D | clk_stm32mp1.c | 903 int divm, divn; in pll_get_fvco() local
1324 u32 divm, divn, divp, frac; in stm32mp1_pll1_opp() local
1698 int divm, divn, divy; in pll_set_rate() local
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| A D | clk_stm32h7.c | 325 u8 divm; member
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| /u-boot/arch/arm/mach-tegra/tegra124/ |
| A D | clock.c | 1069 u32 divm, divn, divp, cpcon; in clock_set_display_rate() local
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