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Searched defs:dpp_base (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dpp_cm.c51 struct dpp *dpp_base) in dpp2_enable_cm_block()
65 struct dpp *dpp_base, in dpp2_degamma_ram_inuse()
86 struct dpp *dpp_base, in dpp2_program_degamma_lut()
117 struct dpp *dpp_base, in dpp2_set_degamma_pwl()
135 struct dpp *dpp_base, in dpp2_set_degamma()
214 struct dpp *dpp_base, in dpp2_cm_set_gamut_remap()
238 struct dpp *dpp_base, in dpp2_program_input_csc()
311 struct dpp *dpp_base, in dpp20_power_on_blnd_lut()
322 struct dpp *dpp_base, in dpp20_configure_blnd_lut()
335 struct dpp *dpp_base, in dpp20_program_blnd_pwl()
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A Ddcn20_dpp.c51 void dpp20_read_state(struct dpp *dpp_base, in dpp20_read_state()
76 struct dpp *dpp_base, in dpp2_power_on_obuf()
91 struct dpp *dpp_base, in dpp2_dummy_program_input_lut()
96 struct dpp *dpp_base, in dpp2_cnv_setup()
255 struct dpp *dpp_base, in dpp2_cnv_set_bias_scale()
326 struct dpp *dpp_base, in dpp2_cnv_set_alpha_keyer()
349 struct dpp *dpp_base, in dpp2_set_cursor_attributes()
A Ddcn20_hwseq.c838 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_blend_lut() local
860 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_shaper_3dlut() local
891 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn20_set_input_transfer_func() local
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_dpp_cm.c161 struct dpp *dpp_base, in dpp1_cm_set_gamut_remap()
240 struct dpp *dpp_base, in dpp1_cm_set_output_csc_default()
310 struct dpp *dpp_base, in dpp1_cm_set_output_csc_adjustment()
351 struct dpp *dpp_base, in dpp1_cm_configure_regamma_lut()
365 struct dpp *dpp_base, in dpp1_cm_program_regamma_luta_settings()
394 struct dpp *dpp_base, in dpp1_cm_program_regamma_lutb_settings()
421 struct dpp *dpp_base, in dpp1_program_input_csc()
497 struct dpp *dpp_base, in dpp1_program_bias_and_scale()
518 struct dpp *dpp_base, in dpp1_program_degamma_lutb_settings()
547 struct dpp *dpp_base, in dpp1_program_degamma_luta_settings()
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A Ddcn10_dpp.c94 void dpp_read_state(struct dpp *dpp_base, in dpp_read_state()
196 void dpp_reset(struct dpp *dpp_base) in dpp_reset()
212 struct dpp *dpp_base, const struct pwl_params *params, enum opp_regamma mode) in dpp1_cm_set_regamma_pwl()
268 struct dpp *dpp_base, in dpp1_set_degamma_format_float()
283 struct dpp *dpp_base, in dpp1_cnv_setup()
419 struct dpp *dpp_base, in dpp1_set_cursor_attributes()
440 struct dpp *dpp_base, in dpp1_set_cursor_position()
482 struct dpp *dpp_base, in dpp1_cnv_set_optional_cursor_attributes()
494 struct dpp *dpp_base, in dpp1_dppclk_control()
A Ddcn10_dpp_dscl.c168 struct dpp *dpp_base, in dpp1_dscl_get_dscl_mode()
202 struct dpp *dpp_base, in dpp1_power_on_dscl()
555 struct dpp *dpp_base, in dpp1_dscl_set_scaler_auto_scale()
715 void dpp1_dscl_set_scaler_manual_scale(struct dpp *dpp_base, in dpp1_dscl_set_scaler_manual_scale()
A Ddcn10_hw_sequencer.c1703 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn10_set_input_transfer_func() local
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_dpp.c56 struct dpp *dpp_base, in dpp3_program_post_csc()
172 struct dpp *dpp_base, in dpp3_cnv_setup()
350 struct dpp *dpp_base, in dpp3_set_cursor_attributes()
478 struct dpp *dpp_base, in dpp3_cnv_set_bias_scale()
492 struct dpp *dpp_base) in dpp3_deferred_update()
540 struct dpp *dpp_base, in dpp3_power_on_blnd_lut()
560 struct dpp *dpp_base, in dpp3_power_on_hdr3dlut()
577 struct dpp *dpp_base, in dpp3_power_on_shaper()
594 struct dpp *dpp_base, in dpp3_configure_blnd_lut()
607 struct dpp *dpp_base, in dpp3_program_blnd_pwl()
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A Ddcn30_dpp_cm.c44 struct dpp *dpp_base) in dpp3_enable_cm_block()
57 static enum dc_lut_mode dpp30_get_gamcor_current(struct dpp *dpp_base) in dpp30_get_gamcor_current()
84 struct dpp *dpp_base, in dpp3_program_gammcor_lut()
133 struct dpp *dpp_base, in dpp3_power_on_gamcor_lut()
152 struct dpp *dpp_base, in dpp3_program_cm_dealpha()
163 struct dpp *dpp_base, in dpp3_program_cm_bias()
208 struct dpp *dpp_base, in dpp3_configure_gamcor_lut()
222 struct dpp *dpp_base, const struct pwl_params *params) in dpp3_program_gamcor_lut()
311 struct dpp *dpp_base, in dpp3_set_hdr_multiplier()
380 struct dpp *dpp_base, in dpp3_cm_set_gamut_remap()
A Ddcn30_hwseq.c74 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_blend_lut() local
95 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_mpc_shaper_3dlut() local
149 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_input_transfer_func() local
/linux/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_dpp.c45 struct dpp *dpp_base, in dpp201_cnv_setup()

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