1 /*
2  * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <errno.h>
8 
9 #include <libfdt.h>
10 
11 #include <platform_def.h>
12 
13 #include <common/debug.h>
14 #include <drivers/delay_timer.h>
15 #include <drivers/st/stm32_i2c.h>
16 #include <drivers/st/stm32mp_pmic.h>
17 #include <drivers/st/stpmic1.h>
18 #include <lib/mmio.h>
19 #include <lib/utils_def.h>
20 
21 #define STPMIC1_LDO12356_OUTPUT_MASK	(uint8_t)(GENMASK(6, 2))
22 #define STPMIC1_LDO12356_OUTPUT_SHIFT	2
23 #define STPMIC1_LDO3_MODE		(uint8_t)(BIT(7))
24 #define STPMIC1_LDO3_DDR_SEL		31U
25 #define STPMIC1_LDO3_1800000		(9U << STPMIC1_LDO12356_OUTPUT_SHIFT)
26 
27 #define STPMIC1_BUCK_OUTPUT_SHIFT	2
28 #define STPMIC1_BUCK3_1V8		(39U << STPMIC1_BUCK_OUTPUT_SHIFT)
29 
30 #define STPMIC1_DEFAULT_START_UP_DELAY_MS	1
31 
32 static struct i2c_handle_s i2c_handle;
33 static uint32_t pmic_i2c_addr;
34 
dt_get_pmic_node(void * fdt)35 static int dt_get_pmic_node(void *fdt)
36 {
37 	return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1");
38 }
39 
dt_pmic_status(void)40 int dt_pmic_status(void)
41 {
42 	int node;
43 	void *fdt;
44 
45 	if (fdt_get_address(&fdt) == 0) {
46 		return -ENOENT;
47 	}
48 
49 	node = dt_get_pmic_node(fdt);
50 	if (node <= 0) {
51 		return -FDT_ERR_NOTFOUND;
52 	}
53 
54 	return fdt_get_status(node);
55 }
56 
dt_pmic_is_secure(void)57 static bool dt_pmic_is_secure(void)
58 {
59 	int status = dt_pmic_status();
60 
61 	return (status >= 0) &&
62 	       (status == DT_SECURE) &&
63 	       (i2c_handle.dt_status == DT_SECURE);
64 }
65 
66 /*
67  * Get PMIC and its I2C bus configuration from the device tree.
68  * Return 0 on success, negative on error, 1 if no PMIC node is found.
69  */
dt_pmic_i2c_config(struct dt_node_info * i2c_info,struct stm32_i2c_init_s * init)70 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info,
71 			      struct stm32_i2c_init_s *init)
72 {
73 	int pmic_node, i2c_node;
74 	void *fdt;
75 	const fdt32_t *cuint;
76 
77 	if (fdt_get_address(&fdt) == 0) {
78 		return -ENOENT;
79 	}
80 
81 	pmic_node = dt_get_pmic_node(fdt);
82 	if (pmic_node < 0) {
83 		return 1;
84 	}
85 
86 	cuint = fdt_getprop(fdt, pmic_node, "reg", NULL);
87 	if (cuint == NULL) {
88 		return -FDT_ERR_NOTFOUND;
89 	}
90 
91 	pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1;
92 	if (pmic_i2c_addr > UINT16_MAX) {
93 		return -EINVAL;
94 	}
95 
96 	i2c_node = fdt_parent_offset(fdt, pmic_node);
97 	if (i2c_node < 0) {
98 		return -FDT_ERR_NOTFOUND;
99 	}
100 
101 	dt_fill_device_info(i2c_info, i2c_node);
102 	if (i2c_info->base == 0U) {
103 		return -FDT_ERR_NOTFOUND;
104 	}
105 
106 	return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init);
107 }
108 
dt_pmic_configure_boot_on_regulators(void)109 int dt_pmic_configure_boot_on_regulators(void)
110 {
111 	int pmic_node, regulators_node, regulator_node;
112 	void *fdt;
113 
114 	if (fdt_get_address(&fdt) == 0) {
115 		return -ENOENT;
116 	}
117 
118 	pmic_node = dt_get_pmic_node(fdt);
119 	if (pmic_node < 0) {
120 		return -FDT_ERR_NOTFOUND;
121 	}
122 
123 	regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators");
124 	if (regulators_node < 0) {
125 		return -ENOENT;
126 	}
127 
128 	fdt_for_each_subnode(regulator_node, fdt, regulators_node) {
129 		const fdt32_t *cuint;
130 		const char *node_name = fdt_get_name(fdt, regulator_node, NULL);
131 		uint16_t voltage;
132 		int status;
133 
134 #if defined(IMAGE_BL2)
135 		if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on",
136 				 NULL) == NULL) &&
137 		    (fdt_getprop(fdt, regulator_node, "regulator-always-on",
138 				 NULL) == NULL)) {
139 #else
140 		if (fdt_getprop(fdt, regulator_node, "regulator-boot-on",
141 				NULL) == NULL) {
142 #endif
143 			continue;
144 		}
145 
146 		if (fdt_getprop(fdt, regulator_node, "regulator-pull-down",
147 				NULL) != NULL) {
148 
149 			status = stpmic1_regulator_pull_down_set(node_name);
150 			if (status != 0) {
151 				return status;
152 			}
153 		}
154 
155 		if (fdt_getprop(fdt, regulator_node, "st,mask-reset",
156 				NULL) != NULL) {
157 
158 			status = stpmic1_regulator_mask_reset_set(node_name);
159 			if (status != 0) {
160 				return status;
161 			}
162 		}
163 
164 		cuint = fdt_getprop(fdt, regulator_node,
165 				    "regulator-min-microvolt", NULL);
166 		if (cuint == NULL) {
167 			continue;
168 		}
169 
170 		/* DT uses microvolts, whereas driver awaits millivolts */
171 		voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U);
172 
173 		status = stpmic1_regulator_voltage_set(node_name, voltage);
174 		if (status != 0) {
175 			return status;
176 		}
177 
178 		if (stpmic1_is_regulator_enabled(node_name) == 0U) {
179 			status = stpmic1_regulator_enable(node_name);
180 			if (status != 0) {
181 				return status;
182 			}
183 		}
184 	}
185 
186 	return 0;
187 }
188 
189 bool initialize_pmic_i2c(void)
190 {
191 	int ret;
192 	struct dt_node_info i2c_info;
193 	struct i2c_handle_s *i2c = &i2c_handle;
194 	struct stm32_i2c_init_s i2c_init;
195 
196 	ret = dt_pmic_i2c_config(&i2c_info, &i2c_init);
197 	if (ret < 0) {
198 		ERROR("I2C configuration failed %d\n", ret);
199 		panic();
200 	}
201 
202 	if (ret != 0) {
203 		return false;
204 	}
205 
206 	/* Initialize PMIC I2C */
207 	i2c->i2c_base_addr		= i2c_info.base;
208 	i2c->dt_status			= i2c_info.status;
209 	i2c->clock			= i2c_info.clock;
210 	i2c->i2c_state			= I2C_STATE_RESET;
211 	i2c_init.own_address1		= pmic_i2c_addr;
212 	i2c_init.addressing_mode	= I2C_ADDRESSINGMODE_7BIT;
213 	i2c_init.dual_address_mode	= I2C_DUALADDRESS_DISABLE;
214 	i2c_init.own_address2		= 0;
215 	i2c_init.own_address2_masks	= I2C_OAR2_OA2NOMASK;
216 	i2c_init.general_call_mode	= I2C_GENERALCALL_DISABLE;
217 	i2c_init.no_stretch_mode	= I2C_NOSTRETCH_DISABLE;
218 	i2c_init.analog_filter		= 1;
219 	i2c_init.digital_filter_coef	= 0;
220 
221 	ret = stm32_i2c_init(i2c, &i2c_init);
222 	if (ret != 0) {
223 		ERROR("Cannot initialize I2C %x (%d)\n",
224 		      i2c->i2c_base_addr, ret);
225 		panic();
226 	}
227 
228 	if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1,
229 				       I2C_TIMEOUT_BUSY_MS)) {
230 		ERROR("I2C device not ready\n");
231 		panic();
232 	}
233 
234 	stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr);
235 
236 	return true;
237 }
238 
239 static void register_pmic_shared_peripherals(void)
240 {
241 	uintptr_t i2c_base = i2c_handle.i2c_base_addr;
242 
243 	if (dt_pmic_is_secure()) {
244 		stm32mp_register_secure_periph_iomem(i2c_base);
245 	} else {
246 		if (i2c_base != 0U) {
247 			stm32mp_register_non_secure_periph_iomem(i2c_base);
248 		}
249 	}
250 }
251 
252 void initialize_pmic(void)
253 {
254 	unsigned long pmic_version;
255 
256 	if (!initialize_pmic_i2c()) {
257 		VERBOSE("No PMIC\n");
258 		return;
259 	}
260 
261 	register_pmic_shared_peripherals();
262 
263 	if (stpmic1_get_version(&pmic_version) != 0) {
264 		ERROR("Failed to access PMIC\n");
265 		panic();
266 	}
267 
268 	INFO("PMIC version = 0x%02lx\n", pmic_version);
269 	stpmic1_dump_regulators();
270 
271 #if defined(IMAGE_BL2)
272 	if (dt_pmic_configure_boot_on_regulators() != 0) {
273 		panic();
274 	};
275 #endif
276 }
277 
278 int pmic_ddr_power_init(enum ddr_type ddr_type)
279 {
280 	bool buck3_at_1v8 = false;
281 	uint8_t read_val;
282 	int status;
283 
284 	switch (ddr_type) {
285 	case STM32MP_DDR3:
286 		/* Set LDO3 to sync mode */
287 		status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
288 		if (status != 0) {
289 			return status;
290 		}
291 
292 		read_val &= ~STPMIC1_LDO3_MODE;
293 		read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
294 		read_val |= STPMIC1_LDO3_DDR_SEL <<
295 			    STPMIC1_LDO12356_OUTPUT_SHIFT;
296 
297 		status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
298 		if (status != 0) {
299 			return status;
300 		}
301 
302 		status = stpmic1_regulator_voltage_set("buck2", 1350);
303 		if (status != 0) {
304 			return status;
305 		}
306 
307 		status = stpmic1_regulator_enable("buck2");
308 		if (status != 0) {
309 			return status;
310 		}
311 
312 		mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
313 
314 		status = stpmic1_regulator_enable("vref_ddr");
315 		if (status != 0) {
316 			return status;
317 		}
318 
319 		mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
320 
321 		status = stpmic1_regulator_enable("ldo3");
322 		if (status != 0) {
323 			return status;
324 		}
325 
326 		mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
327 		break;
328 
329 	case STM32MP_LPDDR2:
330 	case STM32MP_LPDDR3:
331 		/*
332 		 * Set LDO3 to 1.8V
333 		 * Set LDO3 to bypass mode if BUCK3 = 1.8V
334 		 * Set LDO3 to normal mode if BUCK3 != 1.8V
335 		 */
336 		status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val);
337 		if (status != 0) {
338 			return status;
339 		}
340 
341 		if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) {
342 			buck3_at_1v8 = true;
343 		}
344 
345 		status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
346 		if (status != 0) {
347 			return status;
348 		}
349 
350 		read_val &= ~STPMIC1_LDO3_MODE;
351 		read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
352 		read_val |= STPMIC1_LDO3_1800000;
353 		if (buck3_at_1v8) {
354 			read_val |= STPMIC1_LDO3_MODE;
355 		}
356 
357 		status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
358 		if (status != 0) {
359 			return status;
360 		}
361 
362 		status = stpmic1_regulator_voltage_set("buck2", 1200);
363 		if (status != 0) {
364 			return status;
365 		}
366 
367 		status = stpmic1_regulator_enable("ldo3");
368 		if (status != 0) {
369 			return status;
370 		}
371 
372 		mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
373 
374 		status = stpmic1_regulator_enable("buck2");
375 		if (status != 0) {
376 			return status;
377 		}
378 
379 		mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
380 
381 		status = stpmic1_regulator_enable("vref_ddr");
382 		if (status != 0) {
383 			return status;
384 		}
385 
386 		mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
387 		break;
388 
389 	default:
390 		break;
391 	};
392 
393 	return 0;
394 }
395