1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2020 Google LLC
4  */
5 
6 #ifndef _ASM_ARCH_HOSTBRIDGE_H_
7 #define _ASM_ARCH_HOSTBRIDGE_H_
8 
9 /**
10  * struct apl_hostbridge_plat - platform data for hostbridge
11  *
12  * @dtplat: Platform data for of-platdata
13  * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1)
14  * @early_pads_count: Number of pads to process
15  * @pciex_region_size: BAR length in bytes
16  * @bdf: Bus/device/function of hostbridge
17  */
18 struct apl_hostbridge_plat {
19 #if CONFIG_IS_ENABLED(OF_PLATDATA)
20 	struct dtd_intel_apl_hostbridge dtplat;
21 #endif
22 	u32 *early_pads;
23 	int early_pads_count;
24 	uint pciex_region_size;
25 	pci_dev_t bdf;
26 };
27 
28 #endif /* _ASM_ARCH_HOSTBRIDGE_H_ */
29