1 /*
2  * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33 
34 #ifndef __MLX5_ACCEL_IPSEC_H__
35 #define __MLX5_ACCEL_IPSEC_H__
36 
37 #include <linux/mlx5/driver.h>
38 #include <linux/mlx5/accel.h>
39 
40 #ifdef CONFIG_MLX5_ACCEL
41 
42 #define MLX5_IPSEC_DEV(mdev) (mlx5_accel_ipsec_device_caps(mdev) & \
43 			      MLX5_ACCEL_IPSEC_CAP_DEVICE)
44 
45 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev);
46 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
47 				   unsigned int count);
48 
49 void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
50 				       struct mlx5_accel_esp_xfrm *xfrm,
51 				       u32 *sa_handle);
52 void mlx5_accel_esp_free_hw_context(struct mlx5_core_dev *mdev, void *context);
53 
54 void mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev);
55 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev);
56 
57 struct mlx5_accel_ipsec_ops {
58 	u32 (*device_caps)(struct mlx5_core_dev *mdev);
59 	unsigned int (*counters_count)(struct mlx5_core_dev *mdev);
60 	int (*counters_read)(struct mlx5_core_dev *mdev, u64 *counters, unsigned int count);
61 	void* (*create_hw_context)(struct mlx5_core_dev *mdev,
62 				   struct mlx5_accel_esp_xfrm *xfrm,
63 				   const __be32 saddr[4], const __be32 daddr[4],
64 				   const __be32 spi, bool is_ipv6, u32 *sa_handle);
65 	void (*free_hw_context)(void *context);
66 	int (*init)(struct mlx5_core_dev *mdev);
67 	void (*cleanup)(struct mlx5_core_dev *mdev);
68 	struct mlx5_accel_esp_xfrm* (*esp_create_xfrm)(struct mlx5_core_dev *mdev,
69 						       const struct mlx5_accel_esp_xfrm_attrs *attrs,
70 						       u32 flags);
71 	int (*esp_modify_xfrm)(struct mlx5_accel_esp_xfrm *xfrm,
72 			       const struct mlx5_accel_esp_xfrm_attrs *attrs);
73 	void (*esp_destroy_xfrm)(struct mlx5_accel_esp_xfrm *xfrm);
74 };
75 
76 #else
77 
78 #define MLX5_IPSEC_DEV(mdev) false
79 
80 static inline void *
mlx5_accel_esp_create_hw_context(struct mlx5_core_dev * mdev,struct mlx5_accel_esp_xfrm * xfrm,u32 * sa_handle)81 mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
82 				 struct mlx5_accel_esp_xfrm *xfrm,
83 				 u32 *sa_handle)
84 {
85 	return NULL;
86 }
87 
mlx5_accel_esp_free_hw_context(struct mlx5_core_dev * mdev,void * context)88 static inline void mlx5_accel_esp_free_hw_context(struct mlx5_core_dev *mdev, void *context) {}
89 
mlx5_accel_ipsec_init(struct mlx5_core_dev * mdev)90 static inline void mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev) {}
91 
mlx5_accel_ipsec_cleanup(struct mlx5_core_dev * mdev)92 static inline void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev) {}
93 
94 #endif /* CONFIG_MLX5_ACCEL */
95 
96 #endif	/* __MLX5_ACCEL_IPSEC_H__ */
97