| /u-boot/drivers/clk/analogbits/ |
| A D | wrpll-cln28hpc.c | 227 u8 fbdiv, divq, best_r, r; in wrpll_configure_for_rate() local
333 u8 fbdiv; in wrpll_calc_output_rate() local
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| /u-boot/drivers/video/rockchip/ |
| A D | rk_mipi.c | 201 u64 fbdiv; in rk_mipi_phy_enable() local
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3128.c | 82 u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0; in pll_para_config() local
245 u32 refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
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| A D | clk_rk3036.c | 177 uint32_t refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
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| A D | clk_pll.c | 254 u32 refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac; in rk3036_pll_get_rate() local
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| A D | clk_rk322x.c | 179 uint32_t refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
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| A D | clk_px30.c | 101 u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0; in pll_clk_set_by_auto() local
264 u32 refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
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| A D | clk_rv1108.c | 126 uint32_t refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
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| A D | clk_rk3399.c | 42 u32 fbdiv; member
370 u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0; in pll_para_config() local
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| A D | clk_rk3328.c | 27 u32 fbdiv; member
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | clock.h | 71 unsigned int fbdiv; member
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| A D | cru_rk3036.h | 60 u32 fbdiv; member
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| A D | cru_rk3128.h | 67 u32 fbdiv; member
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| A D | cru_rk322x.h | 61 u32 fbdiv; member
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| A D | cru_rv1108.h | 57 u32 fbdiv; member
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| A D | cru_px30.h | 102 unsigned int fbdiv; member
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| /u-boot/drivers/clk/ |
| A D | clk-hsdk-cgu.c | 196 const u8 fbdiv; member
427 u32 idiv, fbdiv, odiv; in pll_get() local
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| A D | clk_versal.c | 385 u32 fbdiv; in versal_clock_get_pll_rate() local
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| /u-boot/drivers/ram/rockchip/ |
| A D | sdram_rk3328.c | 78 unsigned int refdiv, postdiv1, postdiv2, fbdiv; in rkclk_set_dpll() local
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| A D | sdram_px30.c | 156 unsigned int refdiv, postdiv1, postdiv2, fbdiv; in rkclk_set_dpll() local
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