1 /* 2 * Copyright (C) 2018 Marvell International Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * https://spdx.org/licenses 6 */ 7 8 /* Those are parameters for xfi mode, which need to be tune for each board type. 9 * For known DB boards the parameters was already calibrated and placed under 10 * the plat/marvell/armada/a8k/<board_type>/board/phy-porting-layer.h 11 */ 12 struct xfi_params { 13 uint8_t g1_ffe_res_sel; 14 uint8_t g1_ffe_cap_sel; 15 uint8_t align90; 16 uint8_t g1_dfe_res; 17 uint8_t g1_amp; 18 uint8_t g1_emph; 19 uint8_t g1_emph_en; 20 uint8_t g1_tx_amp_adj; 21 uint8_t g1_tx_emph_en; 22 uint8_t g1_tx_emph; 23 uint8_t g1_rx_selmuff; 24 uint8_t g1_rx_selmufi; 25 uint8_t g1_rx_selmupf; 26 uint8_t g1_rx_selmupi; 27 _Bool valid; 28 }; 29 30 struct sata_params { 31 uint8_t g1_amp; 32 uint8_t g2_amp; 33 uint8_t g3_amp; 34 35 uint8_t g1_emph; 36 uint8_t g2_emph; 37 uint8_t g3_emph; 38 39 uint8_t g1_emph_en; 40 uint8_t g2_emph_en; 41 uint8_t g3_emph_en; 42 43 uint8_t g1_tx_amp_adj; 44 uint8_t g2_tx_amp_adj; 45 uint8_t g3_tx_amp_adj; 46 47 uint8_t g1_tx_emph_en; 48 uint8_t g2_tx_emph_en; 49 uint8_t g3_tx_emph_en; 50 51 uint8_t g1_tx_emph; 52 uint8_t g2_tx_emph; 53 uint8_t g3_tx_emph; 54 55 uint8_t g3_dfe_res; 56 57 uint8_t g3_ffe_res_sel; 58 59 uint8_t g3_ffe_cap_sel; 60 61 uint8_t align90; 62 63 uint8_t g1_rx_selmuff; 64 uint8_t g2_rx_selmuff; 65 uint8_t g3_rx_selmuff; 66 67 uint8_t g1_rx_selmufi; 68 uint8_t g2_rx_selmufi; 69 uint8_t g3_rx_selmufi; 70 71 uint8_t g1_rx_selmupf; 72 uint8_t g2_rx_selmupf; 73 uint8_t g3_rx_selmupf; 74 75 uint8_t g1_rx_selmupi; 76 uint8_t g2_rx_selmupi; 77 uint8_t g3_rx_selmupi; 78 79 uint8_t polarity_invert; 80 81 _Bool valid; 82 }; 83 84 struct usb_params { 85 uint8_t polarity_invert; 86 }; 87 88 int mvebu_cp110_comphy_is_pll_locked(uint64_t comphy_base, 89 uint8_t comphy_index); 90 int mvebu_cp110_comphy_power_off(uint64_t comphy_base, 91 uint8_t comphy_index, uint64_t comphy_mode); 92 int mvebu_cp110_comphy_power_on(uint64_t comphy_base, uint8_t comphy_index, 93 uint64_t comphy_mode, 94 uint64_t comphy_train_base); 95 int mvebu_cp110_comphy_xfi_rx_training(uint64_t comphy_base, 96 uint8_t comphy_index); 97 int mvebu_cp110_comphy_digital_reset(uint64_t comphy_base, uint8_t comphy_index, 98 uint32_t comphy_mode, uint32_t command); 99 100 #define COMPHY_POLARITY_NO_INVERT 0 101 #define COMPHY_POLARITY_TXD_INVERT 1 102 #define COMPHY_POLARITY_RXD_INVERT 2 103