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Searched defs:gate (Results 1 – 25 of 25) sorted by relevance

/u-boot/drivers/clk/
A Dclk-gate.c49 struct clk_gate *gate = to_clk_gate(clk); in clk_gate_endisable() local
91 struct clk_gate *gate = to_clk_gate(clk); in clk_gate_is_enabled() local
120 struct clk_gate *gate; in clk_register_gate() local
A Dclk-composite.c77 struct clk *gate = composite->gate; in clk_composite_enable() local
90 struct clk *gate = composite->gate; in clk_composite_disable() local
104 struct clk *gate, in clk_register_composite()
A Dclk_sandbox_ccf.c97 struct clk_gate2 *gate = to_clk_gate2(dev_get_clk_ptr(clk->dev)); in clk_gate2_enable() local
105 struct clk_gate2 *gate = to_clk_gate2(dev_get_clk_ptr(clk->dev)); in clk_gate2_disable() local
123 struct clk_gate2 *gate; in sandbox_clk_register_gate2() local
176 struct clk_gate *gate = NULL; in sandbox_clk_composite() local
A Dclk_stm32mp1.c424 const struct stm32mp1_clk_gate *gate; member
797 const struct stm32mp1_clk_gate *gate = priv->data->gate; in stm32mp1_clk_get_id() local
816 const struct stm32mp1_clk_gate *gate = priv->data->gate; in stm32mp1_clk_get_sel() local
829 const struct stm32mp1_clk_gate *gate = priv->data->gate; in stm32mp1_clk_get_fixed_parent() local
1147 const struct stm32mp1_clk_gate *gate = priv->data->gate; in stm32mp1_clk_enable() local
1166 const struct stm32mp1_clk_gate *gate = priv->data->gate; in stm32mp1_clk_disable() local
/u-boot/drivers/clk/imx/
A Dclk-gate2.c42 struct clk_gate2 *gate = to_clk_gate2(clk); in clk_gate2_enable() local
55 struct clk_gate2 *gate = to_clk_gate2(clk); in clk_gate2_disable() local
87 struct clk_gate2 *gate; in clk_register_gate2() local
A Dclk-composite-8m.c127 struct clk_gate *gate = NULL; in imx8m_clk_composite_flags() local
/u-boot/arch/arm/cpu/armv7/bcm235xx/
A Dclk-core.h96 #define gate_exists(gate) FLAG_TEST(gate, GATE, EXISTS) argument
97 #define gate_is_enabled(gate) FLAG_TEST(gate, GATE, ENABLED) argument
98 #define gate_is_hw_controllable(gate) FLAG_TEST(gate, GATE, HW) argument
99 #define gate_is_sw_controllable(gate) FLAG_TEST(gate, GATE, SW) argument
100 #define gate_is_sw_managed(gate) FLAG_TEST(gate, GATE, SW_MANAGED) argument
101 #define gate_is_no_disable(gate) FLAG_TEST(gate, GATE, NO_DISABLE) argument
103 #define gate_flip_enabled(gate) FLAG_FLIP(gate, GATE, ENABLED) argument
391 struct bcm_clk_gate gate; member
395 struct bcm_clk_gate gate; member
399 struct bcm_clk_gate gate; member
A Dclk-core.c85 struct bcm_clk_gate *gate = &cd->gate; in peri_clk_enable() local
/u-boot/arch/arm/cpu/armv7/bcm281xx/
A Dclk-core.h96 #define gate_exists(gate) FLAG_TEST(gate, GATE, EXISTS) argument
97 #define gate_is_enabled(gate) FLAG_TEST(gate, GATE, ENABLED) argument
98 #define gate_is_hw_controllable(gate) FLAG_TEST(gate, GATE, HW) argument
99 #define gate_is_sw_controllable(gate) FLAG_TEST(gate, GATE, SW) argument
100 #define gate_is_sw_managed(gate) FLAG_TEST(gate, GATE, SW_MANAGED) argument
101 #define gate_is_no_disable(gate) FLAG_TEST(gate, GATE, NO_DISABLE) argument
103 #define gate_flip_enabled(gate) FLAG_FLIP(gate, GATE, ENABLED) argument
391 struct bcm_clk_gate gate; member
395 struct bcm_clk_gate gate; member
399 struct bcm_clk_gate gate; member
A Dclk-core.c85 struct bcm_clk_gate *gate = &cd->gate; in peri_clk_enable() local
/u-boot/drivers/clk/meson/
A Dg12a-ao.c29 struct meson_gate *gate; in meson_set_gate() local
A Daxg.c57 struct meson_gate *gate; in meson_set_gate() local
A Dgxbb.c201 struct meson_gate *gate; in meson_set_gate_by_id() local
A Dg12a.c148 struct meson_gate *gate; in meson_set_gate_by_id() local
/u-boot/drivers/clk/sunxi/
A Dclk_sunxi.c27 const struct ccu_clk_gate *gate = priv_to_gate(priv, clk->id); in sunxi_set_gate() local
/u-boot/drivers/clk/mediatek/
A Dclk-mtk.c418 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_enable() local
445 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_disable() local
472 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_get_rate() local
/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c171 u32 shift, mask, gate, valid; in scg_apll_pfd_get_rate() local
221 u32 shift, mask, gate, valid; in scg_spll_pfd_get_rate() local
634 u32 shift, mask, gate, valid; in scg_enable_pll_pfd() local
/u-boot/drivers/clk/kendryte/
A Dclk.c330 u8 gate; member
391 struct clk_gate *gate = kzalloc(sizeof(*gate), GFP_KERNEL); in k210_create_gate() local
429 struct clk_gate *gate; in k210_register_comp() local
/u-boot/drivers/clk/uniphier/
A Dclk-uniphier.h45 struct uniphier_clk_gate_data gate; member
A Dclk-uniphier-core.c31 const struct uniphier_clk_gate_data *gate) in uniphier_clk_gate_enable()
/u-boot/include/linux/
A Dclk-provider.h211 struct clk *gate; member
/u-boot/drivers/ram/rockchip/
A Dsdram_px30.c323 u32 gate[4]; in check_rd_gate() local
/u-boot/drivers/clk/rockchip/
A Dclk_px30.c422 u32 con, fracdiv, gate; in px30_i2s_get_clk() local
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h425 u8 gate[64]; /* Gate */ member
/u-boot/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h1016 u8 gate[64]; /* Gate */ member

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