1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Generic PHY Management code
4 *
5 * Copyright 2011 Freescale Semiconductor, Inc.
6 * author Andy Fleming
7 *
8 * Based loosely off of Linux's PHY Lib
9 */
10 #include <common.h>
11 #include <console.h>
12 #include <dm.h>
13 #include <log.h>
14 #include <malloc.h>
15 #include <net.h>
16 #include <command.h>
17 #include <miiphy.h>
18 #include <phy.h>
19 #include <errno.h>
20 #include <asm/global_data.h>
21 #include <linux/bitops.h>
22 #include <linux/delay.h>
23 #include <linux/err.h>
24 #include <linux/compiler.h>
25
26 DECLARE_GLOBAL_DATA_PTR;
27
28 /* Generic PHY support and helper functions */
29
30 /**
31 * genphy_config_advert - sanitize and advertise auto-negotiation parameters
32 * @phydev: target phy_device struct
33 *
34 * Description: Writes MII_ADVERTISE with the appropriate values,
35 * after sanitizing the values to make sure we only advertise
36 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
37 * hasn't changed, and > 0 if it has changed.
38 */
genphy_config_advert(struct phy_device * phydev)39 static int genphy_config_advert(struct phy_device *phydev)
40 {
41 u32 advertise;
42 int oldadv, adv, bmsr;
43 int err, changed = 0;
44
45 /* Only allow advertising what this PHY supports */
46 phydev->advertising &= phydev->supported;
47 advertise = phydev->advertising;
48
49 /* Setup standard advertisement */
50 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
51 oldadv = adv;
52
53 if (adv < 0)
54 return adv;
55
56 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
57 ADVERTISE_PAUSE_ASYM);
58 if (advertise & ADVERTISED_10baseT_Half)
59 adv |= ADVERTISE_10HALF;
60 if (advertise & ADVERTISED_10baseT_Full)
61 adv |= ADVERTISE_10FULL;
62 if (advertise & ADVERTISED_100baseT_Half)
63 adv |= ADVERTISE_100HALF;
64 if (advertise & ADVERTISED_100baseT_Full)
65 adv |= ADVERTISE_100FULL;
66 if (advertise & ADVERTISED_Pause)
67 adv |= ADVERTISE_PAUSE_CAP;
68 if (advertise & ADVERTISED_Asym_Pause)
69 adv |= ADVERTISE_PAUSE_ASYM;
70 if (advertise & ADVERTISED_1000baseX_Half)
71 adv |= ADVERTISE_1000XHALF;
72 if (advertise & ADVERTISED_1000baseX_Full)
73 adv |= ADVERTISE_1000XFULL;
74
75 if (adv != oldadv) {
76 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
77
78 if (err < 0)
79 return err;
80 changed = 1;
81 }
82
83 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
84 if (bmsr < 0)
85 return bmsr;
86
87 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
88 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
89 * logical 1.
90 */
91 if (!(bmsr & BMSR_ESTATEN))
92 return changed;
93
94 /* Configure gigabit if it's supported */
95 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
96 oldadv = adv;
97
98 if (adv < 0)
99 return adv;
100
101 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
102
103 if (phydev->supported & (SUPPORTED_1000baseT_Half |
104 SUPPORTED_1000baseT_Full)) {
105 if (advertise & SUPPORTED_1000baseT_Half)
106 adv |= ADVERTISE_1000HALF;
107 if (advertise & SUPPORTED_1000baseT_Full)
108 adv |= ADVERTISE_1000FULL;
109 }
110
111 if (adv != oldadv)
112 changed = 1;
113
114 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
115 if (err < 0)
116 return err;
117
118 return changed;
119 }
120
121 /**
122 * genphy_setup_forced - configures/forces speed/duplex from @phydev
123 * @phydev: target phy_device struct
124 *
125 * Description: Configures MII_BMCR to force speed/duplex
126 * to the values in phydev. Assumes that the values are valid.
127 */
genphy_setup_forced(struct phy_device * phydev)128 static int genphy_setup_forced(struct phy_device *phydev)
129 {
130 int err;
131 int ctl = BMCR_ANRESTART;
132
133 phydev->pause = 0;
134 phydev->asym_pause = 0;
135
136 if (phydev->speed == SPEED_1000)
137 ctl |= BMCR_SPEED1000;
138 else if (phydev->speed == SPEED_100)
139 ctl |= BMCR_SPEED100;
140
141 if (phydev->duplex == DUPLEX_FULL)
142 ctl |= BMCR_FULLDPLX;
143
144 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
145
146 return err;
147 }
148
149 /**
150 * genphy_restart_aneg - Enable and Restart Autonegotiation
151 * @phydev: target phy_device struct
152 */
genphy_restart_aneg(struct phy_device * phydev)153 int genphy_restart_aneg(struct phy_device *phydev)
154 {
155 int ctl;
156
157 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
158
159 if (ctl < 0)
160 return ctl;
161
162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
163
164 /* Don't isolate the PHY if we're negotiating */
165 ctl &= ~(BMCR_ISOLATE);
166
167 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
168
169 return ctl;
170 }
171
172 /**
173 * genphy_config_aneg - restart auto-negotiation or write BMCR
174 * @phydev: target phy_device struct
175 *
176 * Description: If auto-negotiation is enabled, we configure the
177 * advertising, and then restart auto-negotiation. If it is not
178 * enabled, then we write the BMCR.
179 */
genphy_config_aneg(struct phy_device * phydev)180 int genphy_config_aneg(struct phy_device *phydev)
181 {
182 int result;
183
184 if (phydev->autoneg != AUTONEG_ENABLE)
185 return genphy_setup_forced(phydev);
186
187 result = genphy_config_advert(phydev);
188
189 if (result < 0) /* error */
190 return result;
191
192 if (result == 0) {
193 /*
194 * Advertisment hasn't changed, but maybe aneg was never on to
195 * begin with? Or maybe phy was isolated?
196 */
197 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
198
199 if (ctl < 0)
200 return ctl;
201
202 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
203 result = 1; /* do restart aneg */
204 }
205
206 /*
207 * Only restart aneg if we are advertising something different
208 * than we were before.
209 */
210 if (result > 0)
211 result = genphy_restart_aneg(phydev);
212
213 return result;
214 }
215
216 /**
217 * genphy_update_link - update link status in @phydev
218 * @phydev: target phy_device struct
219 *
220 * Description: Update the value in phydev->link to reflect the
221 * current link value. In order to do this, we need to read
222 * the status register twice, keeping the second value.
223 */
genphy_update_link(struct phy_device * phydev)224 int genphy_update_link(struct phy_device *phydev)
225 {
226 unsigned int mii_reg;
227
228 /*
229 * Wait if the link is up, and autonegotiation is in progress
230 * (ie - we're capable and it's not done)
231 */
232 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
233
234 /*
235 * If we already saw the link up, and it hasn't gone down, then
236 * we don't need to wait for autoneg again
237 */
238 if (phydev->link && mii_reg & BMSR_LSTATUS)
239 return 0;
240
241 if ((phydev->autoneg == AUTONEG_ENABLE) &&
242 !(mii_reg & BMSR_ANEGCOMPLETE)) {
243 int i = 0;
244
245 printf("%s Waiting for PHY auto negotiation to complete",
246 phydev->dev->name);
247 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
248 /*
249 * Timeout reached ?
250 */
251 if (i > (PHY_ANEG_TIMEOUT / 50)) {
252 printf(" TIMEOUT !\n");
253 phydev->link = 0;
254 return -ETIMEDOUT;
255 }
256
257 if (ctrlc()) {
258 puts("user interrupt!\n");
259 phydev->link = 0;
260 return -EINTR;
261 }
262
263 if ((i++ % 10) == 0)
264 printf(".");
265
266 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
267 mdelay(50); /* 50 ms */
268 }
269 printf(" done\n");
270 phydev->link = 1;
271 } else {
272 /* Read the link a second time to clear the latched state */
273 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
274
275 if (mii_reg & BMSR_LSTATUS)
276 phydev->link = 1;
277 else
278 phydev->link = 0;
279 }
280
281 return 0;
282 }
283
284 /*
285 * Generic function which updates the speed and duplex. If
286 * autonegotiation is enabled, it uses the AND of the link
287 * partner's advertised capabilities and our advertised
288 * capabilities. If autonegotiation is disabled, we use the
289 * appropriate bits in the control register.
290 *
291 * Stolen from Linux's mii.c and phy_device.c
292 */
genphy_parse_link(struct phy_device * phydev)293 int genphy_parse_link(struct phy_device *phydev)
294 {
295 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
296
297 /* We're using autonegotiation */
298 if (phydev->autoneg == AUTONEG_ENABLE) {
299 u32 lpa = 0;
300 int gblpa = 0;
301 u32 estatus = 0;
302
303 /* Check for gigabit capability */
304 if (phydev->supported & (SUPPORTED_1000baseT_Full |
305 SUPPORTED_1000baseT_Half)) {
306 /* We want a list of states supported by
307 * both PHYs in the link
308 */
309 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
310 if (gblpa < 0) {
311 debug("Could not read MII_STAT1000. ");
312 debug("Ignoring gigabit capability\n");
313 gblpa = 0;
314 }
315 gblpa &= phy_read(phydev,
316 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
317 }
318
319 /* Set the baseline so we only have to set them
320 * if they're different
321 */
322 phydev->speed = SPEED_10;
323 phydev->duplex = DUPLEX_HALF;
324
325 /* Check the gigabit fields */
326 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
327 phydev->speed = SPEED_1000;
328
329 if (gblpa & PHY_1000BTSR_1000FD)
330 phydev->duplex = DUPLEX_FULL;
331
332 /* We're done! */
333 return 0;
334 }
335
336 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
337 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
338
339 if (lpa & (LPA_100FULL | LPA_100HALF)) {
340 phydev->speed = SPEED_100;
341
342 if (lpa & LPA_100FULL)
343 phydev->duplex = DUPLEX_FULL;
344
345 } else if (lpa & LPA_10FULL) {
346 phydev->duplex = DUPLEX_FULL;
347 }
348
349 /*
350 * Extended status may indicate that the PHY supports
351 * 1000BASE-T/X even though the 1000BASE-T registers
352 * are missing. In this case we can't tell whether the
353 * peer also supports it, so we only check extended
354 * status if the 1000BASE-T registers are actually
355 * missing.
356 */
357 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
358 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
359 MII_ESTATUS);
360
361 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
362 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
363 phydev->speed = SPEED_1000;
364 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
365 phydev->duplex = DUPLEX_FULL;
366 }
367
368 } else {
369 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
370
371 phydev->speed = SPEED_10;
372 phydev->duplex = DUPLEX_HALF;
373
374 if (bmcr & BMCR_FULLDPLX)
375 phydev->duplex = DUPLEX_FULL;
376
377 if (bmcr & BMCR_SPEED1000)
378 phydev->speed = SPEED_1000;
379 else if (bmcr & BMCR_SPEED100)
380 phydev->speed = SPEED_100;
381 }
382
383 return 0;
384 }
385
genphy_config(struct phy_device * phydev)386 int genphy_config(struct phy_device *phydev)
387 {
388 int val;
389 u32 features;
390
391 features = (SUPPORTED_TP | SUPPORTED_MII
392 | SUPPORTED_AUI | SUPPORTED_FIBRE |
393 SUPPORTED_BNC);
394
395 /* Do we support autonegotiation? */
396 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
397
398 if (val < 0)
399 return val;
400
401 if (val & BMSR_ANEGCAPABLE)
402 features |= SUPPORTED_Autoneg;
403
404 if (val & BMSR_100FULL)
405 features |= SUPPORTED_100baseT_Full;
406 if (val & BMSR_100HALF)
407 features |= SUPPORTED_100baseT_Half;
408 if (val & BMSR_10FULL)
409 features |= SUPPORTED_10baseT_Full;
410 if (val & BMSR_10HALF)
411 features |= SUPPORTED_10baseT_Half;
412
413 if (val & BMSR_ESTATEN) {
414 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
415
416 if (val < 0)
417 return val;
418
419 if (val & ESTATUS_1000_TFULL)
420 features |= SUPPORTED_1000baseT_Full;
421 if (val & ESTATUS_1000_THALF)
422 features |= SUPPORTED_1000baseT_Half;
423 if (val & ESTATUS_1000_XFULL)
424 features |= SUPPORTED_1000baseX_Full;
425 if (val & ESTATUS_1000_XHALF)
426 features |= SUPPORTED_1000baseX_Half;
427 }
428
429 phydev->supported &= features;
430 phydev->advertising &= features;
431
432 genphy_config_aneg(phydev);
433
434 return 0;
435 }
436
genphy_startup(struct phy_device * phydev)437 int genphy_startup(struct phy_device *phydev)
438 {
439 int ret;
440
441 ret = genphy_update_link(phydev);
442 if (ret)
443 return ret;
444
445 return genphy_parse_link(phydev);
446 }
447
genphy_shutdown(struct phy_device * phydev)448 int genphy_shutdown(struct phy_device *phydev)
449 {
450 return 0;
451 }
452
453 static struct phy_driver genphy_driver = {
454 .uid = 0xffffffff,
455 .mask = 0xffffffff,
456 .name = "Generic PHY",
457 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
458 SUPPORTED_AUI | SUPPORTED_FIBRE |
459 SUPPORTED_BNC,
460 .config = genphy_config,
461 .startup = genphy_startup,
462 .shutdown = genphy_shutdown,
463 };
464
genphy_init(void)465 int genphy_init(void)
466 {
467 return phy_register(&genphy_driver);
468 }
469
470 static LIST_HEAD(phy_drivers);
471
phy_init(void)472 int phy_init(void)
473 {
474 #ifdef CONFIG_NEEDS_MANUAL_RELOC
475 /*
476 * The pointers inside phy_drivers also needs to be updated incase of
477 * manual reloc, without which these points to some invalid
478 * pre reloc address and leads to invalid accesses, hangs.
479 */
480 struct list_head *head = &phy_drivers;
481
482 head->next = (void *)head->next + gd->reloc_off;
483 head->prev = (void *)head->prev + gd->reloc_off;
484 #endif
485
486 #ifdef CONFIG_B53_SWITCH
487 phy_b53_init();
488 #endif
489 #ifdef CONFIG_MV88E61XX_SWITCH
490 phy_mv88e61xx_init();
491 #endif
492 #ifdef CONFIG_PHY_AQUANTIA
493 phy_aquantia_init();
494 #endif
495 #ifdef CONFIG_PHY_ATHEROS
496 phy_atheros_init();
497 #endif
498 #ifdef CONFIG_PHY_BROADCOM
499 phy_broadcom_init();
500 #endif
501 #ifdef CONFIG_PHY_CORTINA
502 phy_cortina_init();
503 #endif
504 #ifdef CONFIG_PHY_CORTINA_ACCESS
505 phy_cortina_access_init();
506 #endif
507 #ifdef CONFIG_PHY_DAVICOM
508 phy_davicom_init();
509 #endif
510 #ifdef CONFIG_PHY_ET1011C
511 phy_et1011c_init();
512 #endif
513 #ifdef CONFIG_PHY_LXT
514 phy_lxt_init();
515 #endif
516 #ifdef CONFIG_PHY_MARVELL
517 phy_marvell_init();
518 #endif
519 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
520 phy_micrel_ksz8xxx_init();
521 #endif
522 #ifdef CONFIG_PHY_MICREL_KSZ90X1
523 phy_micrel_ksz90x1_init();
524 #endif
525 #ifdef CONFIG_PHY_MESON_GXL
526 phy_meson_gxl_init();
527 #endif
528 #ifdef CONFIG_PHY_NATSEMI
529 phy_natsemi_init();
530 #endif
531 #ifdef CONFIG_PHY_REALTEK
532 phy_realtek_init();
533 #endif
534 #ifdef CONFIG_PHY_SMSC
535 phy_smsc_init();
536 #endif
537 #ifdef CONFIG_PHY_TERANETICS
538 phy_teranetics_init();
539 #endif
540 #ifdef CONFIG_PHY_TI
541 phy_ti_init();
542 #endif
543 #ifdef CONFIG_PHY_VITESSE
544 phy_vitesse_init();
545 #endif
546 #ifdef CONFIG_PHY_XILINX
547 phy_xilinx_init();
548 #endif
549 #ifdef CONFIG_PHY_MSCC
550 phy_mscc_init();
551 #endif
552 #ifdef CONFIG_PHY_FIXED
553 phy_fixed_init();
554 #endif
555 #ifdef CONFIG_PHY_NCSI
556 phy_ncsi_init();
557 #endif
558 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
559 phy_xilinx_gmii2rgmii_init();
560 #endif
561 genphy_init();
562
563 return 0;
564 }
565
phy_register(struct phy_driver * drv)566 int phy_register(struct phy_driver *drv)
567 {
568 INIT_LIST_HEAD(&drv->list);
569 list_add_tail(&drv->list, &phy_drivers);
570
571 #ifdef CONFIG_NEEDS_MANUAL_RELOC
572 if (drv->probe)
573 drv->probe += gd->reloc_off;
574 if (drv->config)
575 drv->config += gd->reloc_off;
576 if (drv->startup)
577 drv->startup += gd->reloc_off;
578 if (drv->shutdown)
579 drv->shutdown += gd->reloc_off;
580 if (drv->readext)
581 drv->readext += gd->reloc_off;
582 if (drv->writeext)
583 drv->writeext += gd->reloc_off;
584 if (drv->read_mmd)
585 drv->read_mmd += gd->reloc_off;
586 if (drv->write_mmd)
587 drv->write_mmd += gd->reloc_off;
588 #endif
589 return 0;
590 }
591
phy_set_supported(struct phy_device * phydev,u32 max_speed)592 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
593 {
594 /* The default values for phydev->supported are provided by the PHY
595 * driver "features" member, we want to reset to sane defaults first
596 * before supporting higher speeds.
597 */
598 phydev->supported &= PHY_DEFAULT_FEATURES;
599
600 switch (max_speed) {
601 default:
602 return -ENOTSUPP;
603 case SPEED_1000:
604 phydev->supported |= PHY_1000BT_FEATURES;
605 /* fall through */
606 case SPEED_100:
607 phydev->supported |= PHY_100BT_FEATURES;
608 /* fall through */
609 case SPEED_10:
610 phydev->supported |= PHY_10BT_FEATURES;
611 }
612
613 return 0;
614 }
615
phy_probe(struct phy_device * phydev)616 static int phy_probe(struct phy_device *phydev)
617 {
618 int err = 0;
619
620 phydev->advertising = phydev->drv->features;
621 phydev->supported = phydev->drv->features;
622
623 phydev->mmds = phydev->drv->mmds;
624
625 if (phydev->drv->probe)
626 err = phydev->drv->probe(phydev);
627
628 return err;
629 }
630
generic_for_interface(phy_interface_t interface)631 static struct phy_driver *generic_for_interface(phy_interface_t interface)
632 {
633 #ifdef CONFIG_PHYLIB_10G
634 if (is_10g_interface(interface))
635 return &gen10g_driver;
636 #endif
637
638 return &genphy_driver;
639 }
640
get_phy_driver(struct phy_device * phydev,phy_interface_t interface)641 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
642 phy_interface_t interface)
643 {
644 struct list_head *entry;
645 int phy_id = phydev->phy_id;
646 struct phy_driver *drv = NULL;
647
648 list_for_each(entry, &phy_drivers) {
649 drv = list_entry(entry, struct phy_driver, list);
650 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
651 return drv;
652 }
653
654 /* If we made it here, there's no driver for this PHY */
655 return generic_for_interface(interface);
656 }
657
phy_device_create(struct mii_dev * bus,int addr,u32 phy_id,bool is_c45,phy_interface_t interface)658 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
659 u32 phy_id, bool is_c45,
660 phy_interface_t interface)
661 {
662 struct phy_device *dev;
663
664 /*
665 * We allocate the device, and initialize the
666 * default values
667 */
668 dev = malloc(sizeof(*dev));
669 if (!dev) {
670 printf("Failed to allocate PHY device for %s:%d\n",
671 bus ? bus->name : "(null bus)", addr);
672 return NULL;
673 }
674
675 memset(dev, 0, sizeof(*dev));
676
677 dev->duplex = -1;
678 dev->link = 0;
679 dev->interface = interface;
680
681 #ifdef CONFIG_DM_ETH
682 dev->node = ofnode_null();
683 #endif
684
685 dev->autoneg = AUTONEG_ENABLE;
686
687 dev->addr = addr;
688 dev->phy_id = phy_id;
689 dev->is_c45 = is_c45;
690 dev->bus = bus;
691
692 dev->drv = get_phy_driver(dev, interface);
693
694 if (phy_probe(dev)) {
695 printf("%s, PHY probe failed\n", __func__);
696 return NULL;
697 }
698
699 if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
700 bus->phymap[addr] = dev;
701
702 return dev;
703 }
704
705 /**
706 * get_phy_id - reads the specified addr for its ID.
707 * @bus: the target MII bus
708 * @addr: PHY address on the MII bus
709 * @phy_id: where to store the ID retrieved.
710 *
711 * Description: Reads the ID registers of the PHY at @addr on the
712 * @bus, stores it in @phy_id and returns zero on success.
713 */
get_phy_id(struct mii_dev * bus,int addr,int devad,u32 * phy_id)714 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
715 {
716 int phy_reg;
717
718 /*
719 * Grab the bits from PHYIR1, and put them
720 * in the upper half
721 */
722 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
723
724 if (phy_reg < 0)
725 return -EIO;
726
727 *phy_id = (phy_reg & 0xffff) << 16;
728
729 /* Grab the bits from PHYIR2, and put them in the lower half */
730 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
731
732 if (phy_reg < 0)
733 return -EIO;
734
735 *phy_id |= (phy_reg & 0xffff);
736
737 return 0;
738 }
739
create_phy_by_mask(struct mii_dev * bus,uint phy_mask,int devad,phy_interface_t interface)740 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
741 uint phy_mask, int devad,
742 phy_interface_t interface)
743 {
744 u32 phy_id = 0xffffffff;
745 bool is_c45;
746
747 while (phy_mask) {
748 int addr = ffs(phy_mask) - 1;
749 int r = get_phy_id(bus, addr, devad, &phy_id);
750
751 /*
752 * If the PHY ID is flat 0 we ignore it. There are C45 PHYs
753 * that return all 0s for C22 reads (like Aquantia AQR112) and
754 * there are C22 PHYs that return all 0s for C45 reads (like
755 * Atheros AR8035).
756 */
757 if (r == 0 && phy_id == 0)
758 goto next;
759
760 /* If the PHY ID is mostly f's, we didn't find anything */
761 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
762 is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
763 return phy_device_create(bus, addr, phy_id, is_c45,
764 interface);
765 }
766 next:
767 phy_mask &= ~(1 << addr);
768 }
769 return NULL;
770 }
771
search_for_existing_phy(struct mii_dev * bus,uint phy_mask,phy_interface_t interface)772 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
773 uint phy_mask,
774 phy_interface_t interface)
775 {
776 /* If we have one, return the existing device, with new interface */
777 while (phy_mask) {
778 int addr = ffs(phy_mask) - 1;
779
780 if (bus->phymap[addr]) {
781 bus->phymap[addr]->interface = interface;
782 return bus->phymap[addr];
783 }
784 phy_mask &= ~(1 << addr);
785 }
786 return NULL;
787 }
788
get_phy_device_by_mask(struct mii_dev * bus,uint phy_mask,phy_interface_t interface)789 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
790 uint phy_mask,
791 phy_interface_t interface)
792 {
793 struct phy_device *phydev;
794 int devad[] = {
795 /* Clause-22 */
796 MDIO_DEVAD_NONE,
797 /* Clause-45 */
798 MDIO_MMD_PMAPMD,
799 MDIO_MMD_WIS,
800 MDIO_MMD_PCS,
801 MDIO_MMD_PHYXS,
802 MDIO_MMD_VEND1,
803 };
804 int i, devad_cnt;
805
806 devad_cnt = sizeof(devad)/sizeof(int);
807 phydev = search_for_existing_phy(bus, phy_mask, interface);
808 if (phydev)
809 return phydev;
810 /* try different access clauses */
811 for (i = 0; i < devad_cnt; i++) {
812 phydev = create_phy_by_mask(bus, phy_mask,
813 devad[i], interface);
814 if (IS_ERR(phydev))
815 return NULL;
816 if (phydev)
817 return phydev;
818 }
819
820 debug("\n%s PHY: ", bus->name);
821 while (phy_mask) {
822 int addr = ffs(phy_mask) - 1;
823
824 debug("%d ", addr);
825 phy_mask &= ~(1 << addr);
826 }
827 debug("not found\n");
828
829 return NULL;
830 }
831
832 /**
833 * get_phy_device - reads the specified PHY device and returns its
834 * @phy_device struct
835 * @bus: the target MII bus
836 * @addr: PHY address on the MII bus
837 *
838 * Description: Reads the ID registers of the PHY at @addr on the
839 * @bus, then allocates and returns the phy_device to represent it.
840 */
get_phy_device(struct mii_dev * bus,int addr,phy_interface_t interface)841 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
842 phy_interface_t interface)
843 {
844 return get_phy_device_by_mask(bus, 1 << addr, interface);
845 }
846
phy_reset(struct phy_device * phydev)847 int phy_reset(struct phy_device *phydev)
848 {
849 int reg;
850 int timeout = 500;
851 int devad = MDIO_DEVAD_NONE;
852
853 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
854 return 0;
855
856 #ifdef CONFIG_PHYLIB_10G
857 /* If it's 10G, we need to issue reset through one of the MMDs */
858 if (is_10g_interface(phydev->interface)) {
859 if (!phydev->mmds)
860 gen10g_discover_mmds(phydev);
861
862 devad = ffs(phydev->mmds) - 1;
863 }
864 #endif
865
866 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
867 debug("PHY reset failed\n");
868 return -1;
869 }
870
871 #ifdef CONFIG_PHY_RESET_DELAY
872 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
873 #endif
874 /*
875 * Poll the control register for the reset bit to go to 0 (it is
876 * auto-clearing). This should happen within 0.5 seconds per the
877 * IEEE spec.
878 */
879 reg = phy_read(phydev, devad, MII_BMCR);
880 while ((reg & BMCR_RESET) && timeout--) {
881 reg = phy_read(phydev, devad, MII_BMCR);
882
883 if (reg < 0) {
884 debug("PHY status read failed\n");
885 return -1;
886 }
887 udelay(1000);
888 }
889
890 if (reg & BMCR_RESET) {
891 puts("PHY reset timed out\n");
892 return -1;
893 }
894
895 return 0;
896 }
897
miiphy_reset(const char * devname,unsigned char addr)898 int miiphy_reset(const char *devname, unsigned char addr)
899 {
900 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
901 struct phy_device *phydev;
902
903 /*
904 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
905 * If later code tries to connect with the right interface, this will
906 * be corrected by get_phy_device in phy_connect()
907 */
908 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
909
910 return phy_reset(phydev);
911 }
912
phy_find_by_mask(struct mii_dev * bus,uint phy_mask,phy_interface_t interface)913 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
914 phy_interface_t interface)
915 {
916 /* Reset the bus */
917 if (bus->reset) {
918 bus->reset(bus);
919
920 /* Wait 15ms to make sure the PHY has come out of hard reset */
921 mdelay(15);
922 }
923
924 return get_phy_device_by_mask(bus, phy_mask, interface);
925 }
926
927 #ifdef CONFIG_DM_ETH
phy_connect_dev(struct phy_device * phydev,struct udevice * dev)928 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
929 #else
930 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
931 #endif
932 {
933 /* Soft Reset the PHY */
934 phy_reset(phydev);
935 if (phydev->dev && phydev->dev != dev) {
936 printf("%s:%d is connected to %s. Reconnecting to %s\n",
937 phydev->bus->name, phydev->addr,
938 phydev->dev->name, dev->name);
939 }
940 phydev->dev = dev;
941 debug("%s connected to %s\n", dev->name, phydev->drv->name);
942 }
943
944 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
945 #ifdef CONFIG_DM_ETH
phy_connect_gmii2rgmii(struct mii_dev * bus,struct udevice * dev,phy_interface_t interface)946 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
947 struct udevice *dev,
948 phy_interface_t interface)
949 #else
950 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
951 struct eth_device *dev,
952 phy_interface_t interface)
953 #endif
954 {
955 struct phy_device *phydev = NULL;
956 int sn = dev_of_offset(dev);
957 int off;
958
959 while (sn > 0) {
960 off = fdt_node_offset_by_compatible(gd->fdt_blob, sn,
961 "xlnx,gmii-to-rgmii-1.0");
962 if (off > 0) {
963 phydev = phy_device_create(bus, off,
964 PHY_GMII2RGMII_ID, false,
965 interface);
966 break;
967 }
968 if (off == -FDT_ERR_NOTFOUND)
969 sn = fdt_first_subnode(gd->fdt_blob, sn);
970 else
971 printf("%s: Error finding compat string:%d\n",
972 __func__, off);
973 }
974
975 return phydev;
976 }
977 #endif
978
979 #ifdef CONFIG_PHY_FIXED
980 /**
981 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
982 * @node: OF node for the container of the fixed-link node
983 *
984 * Description: Creates a struct phy_device based on a fixed-link of_node
985 * description. Can be used without phy_connect by drivers which do not expose
986 * a UCLASS_ETH udevice.
987 */
fixed_phy_create(ofnode node)988 struct phy_device *fixed_phy_create(ofnode node)
989 {
990 phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
991 const char *if_str;
992 ofnode subnode;
993
994 if_str = ofnode_read_string(node, "phy-mode");
995 if (!if_str) {
996 if_str = ofnode_read_string(node, "phy-interface-type");
997 }
998 if (if_str) {
999 interface = phy_get_interface_by_name(if_str);
1000 }
1001
1002 subnode = ofnode_find_subnode(node, "fixed-link");
1003 if (!ofnode_valid(subnode)) {
1004 return NULL;
1005 }
1006
1007 return phy_device_create(NULL, ofnode_to_offset(subnode), PHY_FIXED_ID,
1008 false, interface);
1009 }
1010
1011 #ifdef CONFIG_DM_ETH
phy_connect_fixed(struct mii_dev * bus,struct udevice * dev,phy_interface_t interface)1012 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
1013 struct udevice *dev,
1014 phy_interface_t interface)
1015 #else
1016 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
1017 struct eth_device *dev,
1018 phy_interface_t interface)
1019 #endif
1020 {
1021 struct phy_device *phydev = NULL;
1022 int sn;
1023 const char *name;
1024
1025 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
1026 while (sn > 0) {
1027 name = fdt_get_name(gd->fdt_blob, sn, NULL);
1028 if (name && strcmp(name, "fixed-link") == 0) {
1029 phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
1030 interface);
1031 break;
1032 }
1033 sn = fdt_next_subnode(gd->fdt_blob, sn);
1034 }
1035
1036 return phydev;
1037 }
1038 #endif
1039
1040 #ifdef CONFIG_DM_ETH
phy_connect(struct mii_dev * bus,int addr,struct udevice * dev,phy_interface_t interface)1041 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1042 struct udevice *dev,
1043 phy_interface_t interface)
1044 #else
1045 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1046 struct eth_device *dev,
1047 phy_interface_t interface)
1048 #endif
1049 {
1050 struct phy_device *phydev = NULL;
1051 uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
1052
1053 #ifdef CONFIG_PHY_FIXED
1054 phydev = phy_connect_fixed(bus, dev, interface);
1055 #endif
1056
1057 #ifdef CONFIG_PHY_NCSI
1058 if (!phydev)
1059 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
1060 #endif
1061
1062 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
1063 if (!phydev)
1064 phydev = phy_connect_gmii2rgmii(bus, dev, interface);
1065 #endif
1066
1067 if (!phydev)
1068 phydev = phy_find_by_mask(bus, mask, interface);
1069
1070 if (phydev)
1071 phy_connect_dev(phydev, dev);
1072 else
1073 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1074 return phydev;
1075 }
1076
1077 /*
1078 * Start the PHY. Returns 0 on success, or a negative error code.
1079 */
phy_startup(struct phy_device * phydev)1080 int phy_startup(struct phy_device *phydev)
1081 {
1082 if (phydev->drv->startup)
1083 return phydev->drv->startup(phydev);
1084
1085 return 0;
1086 }
1087
board_phy_config(struct phy_device * phydev)1088 __weak int board_phy_config(struct phy_device *phydev)
1089 {
1090 if (phydev->drv->config)
1091 return phydev->drv->config(phydev);
1092 return 0;
1093 }
1094
phy_config(struct phy_device * phydev)1095 int phy_config(struct phy_device *phydev)
1096 {
1097 /* Invoke an optional board-specific helper */
1098 return board_phy_config(phydev);
1099 }
1100
phy_shutdown(struct phy_device * phydev)1101 int phy_shutdown(struct phy_device *phydev)
1102 {
1103 if (phydev->drv->shutdown)
1104 phydev->drv->shutdown(phydev);
1105
1106 return 0;
1107 }
1108
phy_get_interface_by_name(const char * str)1109 int phy_get_interface_by_name(const char *str)
1110 {
1111 int i;
1112
1113 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1114 if (!strcmp(str, phy_interface_strings[i]))
1115 return i;
1116 }
1117
1118 return -1;
1119 }
1120