1 /*
2 * Copyright 2021 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #include <assert.h>
9 #include <errno.h>
10 #include <stddef.h>
11 #include <stdint.h>
12 #include <stdio.h>
13 #include <stdlib.h>
14 #include <string.h>
15
16 #include <common/debug.h>
17 #ifndef NXP_COINED_BB
18 #include <flash_info.h>
19 #include <fspi.h>
20 #include <fspi_api.h>
21 #endif
22 #include <lib/mmio.h>
23 #ifdef NXP_COINED_BB
24 #include <snvs.h>
25 #else
26 #include <xspi_error_codes.h>
27 #endif
28
29 #include <plat_nv_storage.h>
30
31 /*This structure will be a static structure and
32 * will be populated as first step of BL2 booting-up.
33 * fspi_strorage.c . To be located in the fspi driver folder.
34 */
35
36 static nv_app_data_t nv_app_data;
37
read_nv_app_data(void)38 int read_nv_app_data(void)
39 {
40 int ret = 0;
41
42 #ifdef NXP_COINED_BB
43 uint8_t *nv_app_data_array = (uint8_t *) &nv_app_data;
44 uint8_t offset = 0U;
45
46 ret = snvs_read_app_data();
47 do {
48 nv_app_data_array[offset] = snvs_read_app_data_bit(offset);
49 offset++;
50
51 } while (offset < APP_DATA_MAX_OFFSET);
52 snvs_clear_app_data();
53 #else
54 uintptr_t nv_base_addr = NV_STORAGE_BASE_ADDR;
55
56 ret = fspi_init(NXP_FLEXSPI_ADDR, NXP_FLEXSPI_FLASH_ADDR);
57
58 if (ret != XSPI_SUCCESS) {
59 ERROR("Failed to initialized driver flexspi-nor.\n");
60 ERROR("exiting warm-reset request.\n");
61 return -ENODEV;
62 }
63
64 xspi_read(nv_base_addr,
65 (uint32_t *)&nv_app_data, sizeof(nv_app_data_t));
66 xspi_sector_erase((uint32_t) nv_base_addr,
67 F_SECTOR_ERASE_SZ);
68 #endif
69 return ret;
70 }
71
wr_nv_app_data(int data_offset,uint8_t * data,int data_size)72 int wr_nv_app_data(int data_offset,
73 uint8_t *data,
74 int data_size)
75 {
76 int ret = 0;
77 #ifdef NXP_COINED_BB
78 #if !TRUSTED_BOARD_BOOT
79 snvs_disable_zeroize_lp_gpr();
80 #endif
81 /* In case LP SecMon General purpose register,
82 * only 1 bit flags can be saved.
83 */
84 if ((data_size > 1) || (*data != DEFAULT_SET_VALUE)) {
85 ERROR("Only binary value is allowed to be written.\n");
86 ERROR("Use flash instead of SNVS GPR as NV location.\n");
87 return -ENODEV;
88 }
89 snvs_write_app_data_bit(data_offset);
90 #else
91 uint8_t read_val[sizeof(nv_app_data_t)];
92 uint8_t ready_to_write_val[sizeof(nv_app_data_t)];
93 uintptr_t nv_base_addr = NV_STORAGE_BASE_ADDR;
94
95 assert((nv_base_addr + data_offset + data_size) > (nv_base_addr + F_SECTOR_ERASE_SZ));
96
97 ret = fspi_init(NXP_FLEXSPI_ADDR, NXP_FLEXSPI_FLASH_ADDR);
98
99 if (ret != XSPI_SUCCESS) {
100 ERROR("Failed to initialized driver flexspi-nor.\n");
101 ERROR("exiting warm-reset request.\n");
102 return -ENODEV;
103 }
104
105 ret = xspi_read(nv_base_addr + data_offset, (uint32_t *)read_val, data_size);
106
107 memset(ready_to_write_val, READY_TO_WRITE_VALUE, ARRAY_SIZE(ready_to_write_val));
108
109 if (memcmp(read_val, ready_to_write_val, data_size) == 0) {
110 xspi_write(nv_base_addr + data_offset, data, data_size);
111 }
112 #endif
113
114 return ret;
115 }
116
get_nv_data(void)117 const nv_app_data_t *get_nv_data(void)
118 {
119 return (const nv_app_data_t *) &nv_app_data;
120 }
121