1 /*
2 * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch_helpers.h>
8 #include <common/bl_common.h>
9 #include <common/debug.h>
10 #include <drivers/arm/cci.h>
11 #include <drivers/console.h>
12 #include <lib/mmio.h>
13 #include <lib/smccc.h>
14 #include <lib/xlat_tables/xlat_tables.h>
15 #include <plat/common/platform.h>
16 #include <services/arm_arch_svc.h>
17
18 #include <mtk_plat_common.h>
19 #include <mtk_sip_svc.h>
20 #include <plat_private.h>
21
22 struct atf_arg_t gteearg;
23
clean_top_32b_of_param(uint32_t smc_fid,u_register_t * px1,u_register_t * px2,u_register_t * px3,u_register_t * px4)24 void clean_top_32b_of_param(uint32_t smc_fid,
25 u_register_t *px1,
26 u_register_t *px2,
27 u_register_t *px3,
28 u_register_t *px4)
29 {
30 /* if parameters from SMC32. Clean top 32 bits */
31 if (0 == (smc_fid & SMC_AARCH64_BIT)) {
32 *px1 = *px1 & SMC32_PARAM_MASK;
33 *px2 = *px2 & SMC32_PARAM_MASK;
34 *px3 = *px3 & SMC32_PARAM_MASK;
35 *px4 = *px4 & SMC32_PARAM_MASK;
36 }
37 }
38
39 #if MTK_SIP_KERNEL_BOOT_ENABLE
40 static struct kernel_info k_info;
41
save_kernel_info(uint64_t pc,uint64_t r0,uint64_t r1,uint64_t k32_64)42 static void save_kernel_info(uint64_t pc,
43 uint64_t r0,
44 uint64_t r1,
45 uint64_t k32_64)
46 {
47 k_info.k32_64 = k32_64;
48 k_info.pc = pc;
49
50 if (LINUX_KERNEL_32 == k32_64) {
51 /* for 32 bits kernel */
52 k_info.r0 = 0;
53 /* machtype */
54 k_info.r1 = r0;
55 /* tags */
56 k_info.r2 = r1;
57 } else {
58 /* for 64 bits kernel */
59 k_info.r0 = r0;
60 k_info.r1 = r1;
61 }
62 }
63
get_kernel_info_pc(void)64 uint64_t get_kernel_info_pc(void)
65 {
66 return k_info.pc;
67 }
68
get_kernel_info_r0(void)69 uint64_t get_kernel_info_r0(void)
70 {
71 return k_info.r0;
72 }
73
get_kernel_info_r1(void)74 uint64_t get_kernel_info_r1(void)
75 {
76 return k_info.r1;
77 }
78
get_kernel_info_r2(void)79 uint64_t get_kernel_info_r2(void)
80 {
81 return k_info.r2;
82 }
83
boot_to_kernel(uint64_t x1,uint64_t x2,uint64_t x3,uint64_t x4)84 void boot_to_kernel(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4)
85 {
86 static uint8_t kernel_boot_once_flag;
87 /* only support in booting flow */
88 if (0 == kernel_boot_once_flag) {
89 kernel_boot_once_flag = 1;
90
91 console_init(gteearg.atf_log_port,
92 UART_CLOCK, UART_BAUDRATE);
93 INFO("save kernel info\n");
94 save_kernel_info(x1, x2, x3, x4);
95 bl31_prepare_kernel_entry(x4);
96 INFO("el3_exit\n");
97 console_uninit();
98 }
99 }
100 #endif
101
plat_get_spsr_for_bl33_entry(void)102 uint32_t plat_get_spsr_for_bl33_entry(void)
103 {
104 unsigned int mode;
105 uint32_t spsr;
106 unsigned int ee;
107 unsigned long daif;
108
109 INFO("Secondary bootloader is AArch32\n");
110 mode = MODE32_svc;
111 ee = 0;
112 /*
113 * TODO: Choose async. exception bits if HYP mode is not
114 * implemented according to the values of SCR.{AW, FW} bits
115 */
116 daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT;
117
118 spsr = SPSR_MODE32(mode, 0, ee, daif);
119 return spsr;
120 }
121
122 /*****************************************************************************
123 * plat_is_smccc_feature_available() - This function checks whether SMCCC
124 * feature is availabile for platform.
125 * @fid: SMCCC function id
126 *
127 * Return SMC_OK if SMCCC feature is available and SMC_ARCH_CALL_NOT_SUPPORTED
128 * otherwise.
129 *****************************************************************************/
plat_is_smccc_feature_available(u_register_t fid)130 int32_t plat_is_smccc_feature_available(u_register_t fid)
131 {
132 switch (fid) {
133 case SMCCC_ARCH_SOC_ID:
134 return SMC_ARCH_CALL_SUCCESS;
135 default:
136 return SMC_ARCH_CALL_NOT_SUPPORTED;
137 }
138 }
139
plat_get_soc_version(void)140 int32_t plat_get_soc_version(void)
141 {
142 uint32_t manfid = SOC_ID_SET_JEP_106(JEDEC_MTK_BKID, JEDEC_MTK_MFID);
143
144 return (int32_t)(manfid | (SOC_CHIP_ID & SOC_ID_IMPL_DEF_MASK));
145 }
146
plat_get_soc_revision(void)147 int32_t plat_get_soc_revision(void)
148 {
149 return 0;
150 }
151