1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  linux/include/linux/mmc/host.h
4  *
5  *  Host driver specific definitions.
6  */
7 #ifndef LINUX_MMC_HOST_H
8 #define LINUX_MMC_HOST_H
9 
10 #include <linux/sched.h>
11 #include <linux/device.h>
12 #include <linux/fault-inject.h>
13 
14 #include <linux/mmc/core.h>
15 #include <linux/mmc/card.h>
16 #include <linux/mmc/pm.h>
17 #include <linux/dma-direction.h>
18 #include <linux/blk-crypto-profile.h>
19 
20 struct mmc_ios {
21 	unsigned int	clock;			/* clock rate */
22 	unsigned short	vdd;
23 	unsigned int	power_delay_ms;		/* waiting for stable power */
24 
25 /* vdd stores the bit number of the selected voltage range from below. */
26 
27 	unsigned char	bus_mode;		/* command output mode */
28 
29 #define MMC_BUSMODE_OPENDRAIN	1
30 #define MMC_BUSMODE_PUSHPULL	2
31 
32 	unsigned char	chip_select;		/* SPI chip select */
33 
34 #define MMC_CS_DONTCARE		0
35 #define MMC_CS_HIGH		1
36 #define MMC_CS_LOW		2
37 
38 	unsigned char	power_mode;		/* power supply mode */
39 
40 #define MMC_POWER_OFF		0
41 #define MMC_POWER_UP		1
42 #define MMC_POWER_ON		2
43 #define MMC_POWER_UNDEFINED	3
44 
45 	unsigned char	bus_width;		/* data bus width */
46 
47 #define MMC_BUS_WIDTH_1		0
48 #define MMC_BUS_WIDTH_4		2
49 #define MMC_BUS_WIDTH_8		3
50 
51 	unsigned char	timing;			/* timing specification used */
52 
53 #define MMC_TIMING_LEGACY	0
54 #define MMC_TIMING_MMC_HS	1
55 #define MMC_TIMING_SD_HS	2
56 #define MMC_TIMING_UHS_SDR12	3
57 #define MMC_TIMING_UHS_SDR25	4
58 #define MMC_TIMING_UHS_SDR50	5
59 #define MMC_TIMING_UHS_SDR104	6
60 #define MMC_TIMING_UHS_DDR50	7
61 #define MMC_TIMING_MMC_DDR52	8
62 #define MMC_TIMING_MMC_HS200	9
63 #define MMC_TIMING_MMC_HS400	10
64 #define MMC_TIMING_SD_EXP	11
65 #define MMC_TIMING_SD_EXP_1_2V	12
66 
67 	unsigned char	signal_voltage;		/* signalling voltage (1.8V or 3.3V) */
68 
69 #define MMC_SIGNAL_VOLTAGE_330	0
70 #define MMC_SIGNAL_VOLTAGE_180	1
71 #define MMC_SIGNAL_VOLTAGE_120	2
72 
73 	unsigned char	drv_type;		/* driver type (A, B, C, D) */
74 
75 #define MMC_SET_DRIVER_TYPE_B	0
76 #define MMC_SET_DRIVER_TYPE_A	1
77 #define MMC_SET_DRIVER_TYPE_C	2
78 #define MMC_SET_DRIVER_TYPE_D	3
79 
80 	bool enhanced_strobe;			/* hs400es selection */
81 };
82 
83 struct mmc_clk_phase {
84 	bool valid;
85 	u16 in_deg;
86 	u16 out_deg;
87 };
88 
89 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
90 struct mmc_clk_phase_map {
91 	struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES];
92 };
93 
94 struct mmc_host;
95 
96 struct mmc_host_ops {
97 	/*
98 	 * It is optional for the host to implement pre_req and post_req in
99 	 * order to support double buffering of requests (prepare one
100 	 * request while another request is active).
101 	 * pre_req() must always be followed by a post_req().
102 	 * To undo a call made to pre_req(), call post_req() with
103 	 * a nonzero err condition.
104 	 */
105 	void	(*post_req)(struct mmc_host *host, struct mmc_request *req,
106 			    int err);
107 	void	(*pre_req)(struct mmc_host *host, struct mmc_request *req);
108 	void	(*request)(struct mmc_host *host, struct mmc_request *req);
109 	/* Submit one request to host in atomic context. */
110 	int	(*request_atomic)(struct mmc_host *host,
111 				  struct mmc_request *req);
112 
113 	/*
114 	 * Avoid calling the next three functions too often or in a "fast
115 	 * path", since underlaying controller might implement them in an
116 	 * expensive and/or slow way. Also note that these functions might
117 	 * sleep, so don't call them in the atomic contexts!
118 	 */
119 
120 	/*
121 	 * Notes to the set_ios callback:
122 	 * ios->clock might be 0. For some controllers, setting 0Hz
123 	 * as any other frequency works. However, some controllers
124 	 * explicitly need to disable the clock. Otherwise e.g. voltage
125 	 * switching might fail because the SDCLK is not really quiet.
126 	 */
127 	void	(*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
128 
129 	/*
130 	 * Return values for the get_ro callback should be:
131 	 *   0 for a read/write card
132 	 *   1 for a read-only card
133 	 *   -ENOSYS when not supported (equal to NULL callback)
134 	 *   or a negative errno value when something bad happened
135 	 */
136 	int	(*get_ro)(struct mmc_host *host);
137 
138 	/*
139 	 * Return values for the get_cd callback should be:
140 	 *   0 for a absent card
141 	 *   1 for a present card
142 	 *   -ENOSYS when not supported (equal to NULL callback)
143 	 *   or a negative errno value when something bad happened
144 	 */
145 	int	(*get_cd)(struct mmc_host *host);
146 
147 	void	(*enable_sdio_irq)(struct mmc_host *host, int enable);
148 	/* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
149 	void	(*ack_sdio_irq)(struct mmc_host *host);
150 
151 	/* optional callback for HC quirks */
152 	void	(*init_card)(struct mmc_host *host, struct mmc_card *card);
153 
154 	int	(*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
155 
156 	/* Check if the card is pulling dat[0] low */
157 	int	(*card_busy)(struct mmc_host *host);
158 
159 	/* The tuning command opcode value is different for SD and eMMC cards */
160 	int	(*execute_tuning)(struct mmc_host *host, u32 opcode);
161 
162 	/* Prepare HS400 target operating frequency depending host driver */
163 	int	(*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
164 
165 	/* Execute HS400 tuning depending host driver */
166 	int	(*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card);
167 
168 	/* Prepare switch to DDR during the HS400 init sequence */
169 	int	(*hs400_prepare_ddr)(struct mmc_host *host);
170 
171 	/* Prepare for switching from HS400 to HS200 */
172 	void	(*hs400_downgrade)(struct mmc_host *host);
173 
174 	/* Complete selection of HS400 */
175 	void	(*hs400_complete)(struct mmc_host *host);
176 
177 	/* Prepare enhanced strobe depending host driver */
178 	void	(*hs400_enhanced_strobe)(struct mmc_host *host,
179 					 struct mmc_ios *ios);
180 	int	(*select_drive_strength)(struct mmc_card *card,
181 					 unsigned int max_dtr, int host_drv,
182 					 int card_drv, int *drv_type);
183 	/* Reset the eMMC card via RST_n */
184 	void	(*hw_reset)(struct mmc_host *host);
185 	void	(*card_event)(struct mmc_host *host);
186 
187 	/*
188 	 * Optional callback to support controllers with HW issues for multiple
189 	 * I/O. Returns the number of supported blocks for the request.
190 	 */
191 	int	(*multi_io_quirk)(struct mmc_card *card,
192 				  unsigned int direction, int blk_size);
193 
194 	/* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */
195 	int	(*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
196 };
197 
198 struct mmc_cqe_ops {
199 	/* Allocate resources, and make the CQE operational */
200 	int	(*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
201 	/* Free resources, and make the CQE non-operational */
202 	void	(*cqe_disable)(struct mmc_host *host);
203 	/*
204 	 * Issue a read, write or DCMD request to the CQE. Also deal with the
205 	 * effect of ->cqe_off().
206 	 */
207 	int	(*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
208 	/* Free resources (e.g. DMA mapping) associated with the request */
209 	void	(*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
210 	/*
211 	 * Prepare the CQE and host controller to accept non-CQ commands. There
212 	 * is no corresponding ->cqe_on(), instead ->cqe_request() is required
213 	 * to deal with that.
214 	 */
215 	void	(*cqe_off)(struct mmc_host *host);
216 	/*
217 	 * Wait for all CQE tasks to complete. Return an error if recovery
218 	 * becomes necessary.
219 	 */
220 	int	(*cqe_wait_for_idle)(struct mmc_host *host);
221 	/*
222 	 * Notify CQE that a request has timed out. Return false if the request
223 	 * completed or true if a timeout happened in which case indicate if
224 	 * recovery is needed.
225 	 */
226 	bool	(*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
227 			       bool *recovery_needed);
228 	/*
229 	 * Stop all CQE activity and prepare the CQE and host controller to
230 	 * accept recovery commands.
231 	 */
232 	void	(*cqe_recovery_start)(struct mmc_host *host);
233 	/*
234 	 * Clear the queue and call mmc_cqe_request_done() on all requests.
235 	 * Requests that errored will have the error set on the mmc_request
236 	 * (data->error or cmd->error for DCMD).  Requests that did not error
237 	 * will have zero data bytes transferred.
238 	 */
239 	void	(*cqe_recovery_finish)(struct mmc_host *host);
240 };
241 
242 struct mmc_async_req {
243 	/* active mmc request */
244 	struct mmc_request	*mrq;
245 	/*
246 	 * Check error status of completed mmc request.
247 	 * Returns 0 if success otherwise non zero.
248 	 */
249 	enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
250 };
251 
252 /**
253  * struct mmc_slot - MMC slot functions
254  *
255  * @cd_irq:		MMC/SD-card slot hotplug detection IRQ or -EINVAL
256  * @handler_priv:	MMC/SD-card slot context
257  *
258  * Some MMC/SD host controllers implement slot-functions like card and
259  * write-protect detection natively. However, a large number of controllers
260  * leave these functions to the CPU. This struct provides a hook to attach
261  * such slot-function drivers.
262  */
263 struct mmc_slot {
264 	int cd_irq;
265 	bool cd_wake_enabled;
266 	void *handler_priv;
267 };
268 
269 /**
270  * mmc_context_info - synchronization details for mmc context
271  * @is_done_rcv		wake up reason was done request
272  * @is_new_req		wake up reason was new request
273  * @is_waiting_last_req	mmc context waiting for single running request
274  * @wait		wait queue
275  */
276 struct mmc_context_info {
277 	bool			is_done_rcv;
278 	bool			is_new_req;
279 	bool			is_waiting_last_req;
280 	wait_queue_head_t	wait;
281 };
282 
283 struct regulator;
284 struct mmc_pwrseq;
285 
286 struct mmc_supply {
287 	struct regulator *vmmc;		/* Card power supply */
288 	struct regulator *vqmmc;	/* Optional Vccq supply */
289 };
290 
291 struct mmc_ctx {
292 	struct task_struct *task;
293 };
294 
295 struct mmc_host {
296 	struct device		*parent;
297 	struct device		class_dev;
298 	int			index;
299 	const struct mmc_host_ops *ops;
300 	struct mmc_pwrseq	*pwrseq;
301 	unsigned int		f_min;
302 	unsigned int		f_max;
303 	unsigned int		f_init;
304 	u32			ocr_avail;
305 	u32			ocr_avail_sdio;	/* SDIO-specific OCR */
306 	u32			ocr_avail_sd;	/* SD-specific OCR */
307 	u32			ocr_avail_mmc;	/* MMC-specific OCR */
308 	struct wakeup_source	*ws;		/* Enable consume of uevents */
309 	u32			max_current_330;
310 	u32			max_current_300;
311 	u32			max_current_180;
312 
313 #define MMC_VDD_165_195		0x00000080	/* VDD voltage 1.65 - 1.95 */
314 #define MMC_VDD_20_21		0x00000100	/* VDD voltage 2.0 ~ 2.1 */
315 #define MMC_VDD_21_22		0x00000200	/* VDD voltage 2.1 ~ 2.2 */
316 #define MMC_VDD_22_23		0x00000400	/* VDD voltage 2.2 ~ 2.3 */
317 #define MMC_VDD_23_24		0x00000800	/* VDD voltage 2.3 ~ 2.4 */
318 #define MMC_VDD_24_25		0x00001000	/* VDD voltage 2.4 ~ 2.5 */
319 #define MMC_VDD_25_26		0x00002000	/* VDD voltage 2.5 ~ 2.6 */
320 #define MMC_VDD_26_27		0x00004000	/* VDD voltage 2.6 ~ 2.7 */
321 #define MMC_VDD_27_28		0x00008000	/* VDD voltage 2.7 ~ 2.8 */
322 #define MMC_VDD_28_29		0x00010000	/* VDD voltage 2.8 ~ 2.9 */
323 #define MMC_VDD_29_30		0x00020000	/* VDD voltage 2.9 ~ 3.0 */
324 #define MMC_VDD_30_31		0x00040000	/* VDD voltage 3.0 ~ 3.1 */
325 #define MMC_VDD_31_32		0x00080000	/* VDD voltage 3.1 ~ 3.2 */
326 #define MMC_VDD_32_33		0x00100000	/* VDD voltage 3.2 ~ 3.3 */
327 #define MMC_VDD_33_34		0x00200000	/* VDD voltage 3.3 ~ 3.4 */
328 #define MMC_VDD_34_35		0x00400000	/* VDD voltage 3.4 ~ 3.5 */
329 #define MMC_VDD_35_36		0x00800000	/* VDD voltage 3.5 ~ 3.6 */
330 
331 	u32			caps;		/* Host capabilities */
332 
333 #define MMC_CAP_4_BIT_DATA	(1 << 0)	/* Can the host do 4 bit transfers */
334 #define MMC_CAP_MMC_HIGHSPEED	(1 << 1)	/* Can do MMC high-speed timing */
335 #define MMC_CAP_SD_HIGHSPEED	(1 << 2)	/* Can do SD high-speed timing */
336 #define MMC_CAP_SDIO_IRQ	(1 << 3)	/* Can signal pending SDIO IRQs */
337 #define MMC_CAP_SPI		(1 << 4)	/* Talks only SPI protocols */
338 #define MMC_CAP_NEEDS_POLL	(1 << 5)	/* Needs polling for card-detection */
339 #define MMC_CAP_8_BIT_DATA	(1 << 6)	/* Can the host do 8 bit transfers */
340 #define MMC_CAP_AGGRESSIVE_PM	(1 << 7)	/* Suspend (e)MMC/SD at idle  */
341 #define MMC_CAP_NONREMOVABLE	(1 << 8)	/* Nonremovable e.g. eMMC */
342 #define MMC_CAP_WAIT_WHILE_BUSY	(1 << 9)	/* Waits while card is busy */
343 #define MMC_CAP_3_3V_DDR	(1 << 11)	/* Host supports eMMC DDR 3.3V */
344 #define MMC_CAP_1_8V_DDR	(1 << 12)	/* Host supports eMMC DDR 1.8V */
345 #define MMC_CAP_1_2V_DDR	(1 << 13)	/* Host supports eMMC DDR 1.2V */
346 #define MMC_CAP_DDR		(MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
347 				 MMC_CAP_1_2V_DDR)
348 #define MMC_CAP_POWER_OFF_CARD	(1 << 14)	/* Can power off after boot */
349 #define MMC_CAP_BUS_WIDTH_TEST	(1 << 15)	/* CMD14/CMD19 bus width ok */
350 #define MMC_CAP_UHS_SDR12	(1 << 16)	/* Host supports UHS SDR12 mode */
351 #define MMC_CAP_UHS_SDR25	(1 << 17)	/* Host supports UHS SDR25 mode */
352 #define MMC_CAP_UHS_SDR50	(1 << 18)	/* Host supports UHS SDR50 mode */
353 #define MMC_CAP_UHS_SDR104	(1 << 19)	/* Host supports UHS SDR104 mode */
354 #define MMC_CAP_UHS_DDR50	(1 << 20)	/* Host supports UHS DDR50 mode */
355 #define MMC_CAP_UHS		(MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
356 				 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
357 				 MMC_CAP_UHS_DDR50)
358 #define MMC_CAP_SYNC_RUNTIME_PM	(1 << 21)	/* Synced runtime PM suspends. */
359 #define MMC_CAP_NEED_RSP_BUSY	(1 << 22)	/* Commands with R1B can't use R1. */
360 #define MMC_CAP_DRIVER_TYPE_A	(1 << 23)	/* Host supports Driver Type A */
361 #define MMC_CAP_DRIVER_TYPE_C	(1 << 24)	/* Host supports Driver Type C */
362 #define MMC_CAP_DRIVER_TYPE_D	(1 << 25)	/* Host supports Driver Type D */
363 #define MMC_CAP_DONE_COMPLETE	(1 << 27)	/* RW reqs can be completed within mmc_request_done() */
364 #define MMC_CAP_CD_WAKE		(1 << 28)	/* Enable card detect wake */
365 #define MMC_CAP_CMD_DURING_TFR	(1 << 29)	/* Commands during data transfer */
366 #define MMC_CAP_CMD23		(1 << 30)	/* CMD23 supported. */
367 #define MMC_CAP_HW_RESET	(1 << 31)	/* Reset the eMMC card via RST_n */
368 
369 	u32			caps2;		/* More host capabilities */
370 
371 #define MMC_CAP2_BOOTPART_NOACC	(1 << 0)	/* Boot partition no access */
372 #define MMC_CAP2_FULL_PWR_CYCLE	(1 << 2)	/* Can do full power cycle */
373 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
374 #define MMC_CAP2_HS200_1_8V_SDR	(1 << 5)        /* can support */
375 #define MMC_CAP2_HS200_1_2V_SDR	(1 << 6)        /* can support */
376 #define MMC_CAP2_HS200		(MMC_CAP2_HS200_1_8V_SDR | \
377 				 MMC_CAP2_HS200_1_2V_SDR)
378 #define MMC_CAP2_SD_EXP		(1 << 7)	/* SD express via PCIe */
379 #define MMC_CAP2_SD_EXP_1_2V	(1 << 8)	/* SD express 1.2V */
380 #define MMC_CAP2_CD_ACTIVE_HIGH	(1 << 10)	/* Card-detect signal active high */
381 #define MMC_CAP2_RO_ACTIVE_HIGH	(1 << 11)	/* Write-protect signal active high */
382 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)	/* Don't power up before scan */
383 #define MMC_CAP2_HS400_1_8V	(1 << 15)	/* Can support HS400 1.8V */
384 #define MMC_CAP2_HS400_1_2V	(1 << 16)	/* Can support HS400 1.2V */
385 #define MMC_CAP2_HS400		(MMC_CAP2_HS400_1_8V | \
386 				 MMC_CAP2_HS400_1_2V)
387 #define MMC_CAP2_HSX00_1_8V	(MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
388 #define MMC_CAP2_HSX00_1_2V	(MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
389 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
390 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)	/* No physical write protect pin, assume that card is always read-write */
391 #define MMC_CAP2_NO_SDIO	(1 << 19)	/* Do not send SDIO commands during initialization */
392 #define MMC_CAP2_HS400_ES	(1 << 20)	/* Host supports enhanced strobe */
393 #define MMC_CAP2_NO_SD		(1 << 21)	/* Do not send SD commands during initialization */
394 #define MMC_CAP2_NO_MMC		(1 << 22)	/* Do not send (e)MMC commands during initialization */
395 #define MMC_CAP2_CQE		(1 << 23)	/* Has eMMC command queue engine */
396 #define MMC_CAP2_CQE_DCMD	(1 << 24)	/* CQE can issue a direct command */
397 #define MMC_CAP2_AVOID_3_3V	(1 << 25)	/* Host must negotiate down from 3.3V */
398 #define MMC_CAP2_MERGE_CAPABLE	(1 << 26)	/* Host can merge a segment over the segment size */
399 #ifdef CONFIG_MMC_CRYPTO
400 #define MMC_CAP2_CRYPTO		(1 << 27)	/* Host supports inline encryption */
401 #else
402 #define MMC_CAP2_CRYPTO		0
403 #endif
404 #define MMC_CAP2_ALT_GPT_TEGRA	(1 << 28)	/* Host with eMMC that has GPT entry at a non-standard location */
405 
406 	int			fixed_drv_type;	/* fixed driver type for non-removable media */
407 
408 	mmc_pm_flag_t		pm_caps;	/* supported pm features */
409 
410 	/* host specific block data */
411 	unsigned int		max_seg_size;	/* see blk_queue_max_segment_size */
412 	unsigned short		max_segs;	/* see blk_queue_max_segments */
413 	unsigned short		unused;
414 	unsigned int		max_req_size;	/* maximum number of bytes in one req */
415 	unsigned int		max_blk_size;	/* maximum size of one mmc block */
416 	unsigned int		max_blk_count;	/* maximum number of blocks in one req */
417 	unsigned int		max_busy_timeout; /* max busy timeout in ms */
418 
419 	/* private data */
420 	spinlock_t		lock;		/* lock for claim and bus ops */
421 
422 	struct mmc_ios		ios;		/* current io bus settings */
423 
424 	/* group bitfields together to minimize padding */
425 	unsigned int		use_spi_crc:1;
426 	unsigned int		claimed:1;	/* host exclusively claimed */
427 	unsigned int		doing_init_tune:1; /* initial tuning in progress */
428 	unsigned int		can_retune:1;	/* re-tuning can be used */
429 	unsigned int		doing_retune:1;	/* re-tuning in progress */
430 	unsigned int		retune_now:1;	/* do re-tuning at next req */
431 	unsigned int		retune_paused:1; /* re-tuning is temporarily disabled */
432 	unsigned int		retune_crc_disable:1; /* don't trigger retune upon crc */
433 	unsigned int		can_dma_map_merge:1; /* merging can be used */
434 
435 	int			rescan_disable;	/* disable card detection */
436 	int			rescan_entered;	/* used with nonremovable devices */
437 
438 	int			need_retune;	/* re-tuning is needed */
439 	int			hold_retune;	/* hold off re-tuning */
440 	unsigned int		retune_period;	/* re-tuning period in secs */
441 	struct timer_list	retune_timer;	/* for periodic re-tuning */
442 
443 	bool			trigger_card_event; /* card_event necessary */
444 
445 	struct mmc_card		*card;		/* device attached to this host */
446 
447 	wait_queue_head_t	wq;
448 	struct mmc_ctx		*claimer;	/* context that has host claimed */
449 	int			claim_cnt;	/* "claim" nesting count */
450 	struct mmc_ctx		default_ctx;	/* default context */
451 
452 	struct delayed_work	detect;
453 	int			detect_change;	/* card detect flag */
454 	struct mmc_slot		slot;
455 
456 	const struct mmc_bus_ops *bus_ops;	/* current bus driver */
457 
458 	unsigned int		sdio_irqs;
459 	struct task_struct	*sdio_irq_thread;
460 	struct delayed_work	sdio_irq_work;
461 	bool			sdio_irq_pending;
462 	atomic_t		sdio_irq_thread_abort;
463 
464 	mmc_pm_flag_t		pm_flags;	/* requested pm features */
465 
466 	struct led_trigger	*led;		/* activity led */
467 
468 #ifdef CONFIG_REGULATOR
469 	bool			regulator_enabled; /* regulator state */
470 #endif
471 	struct mmc_supply	supply;
472 
473 	struct dentry		*debugfs_root;
474 
475 	/* Ongoing data transfer that allows commands during transfer */
476 	struct mmc_request	*ongoing_mrq;
477 
478 #ifdef CONFIG_FAIL_MMC_REQUEST
479 	struct fault_attr	fail_mmc_request;
480 #endif
481 
482 	unsigned int		actual_clock;	/* Actual HC clock rate */
483 
484 	unsigned int		slotno;	/* used for sdio acpi binding */
485 
486 	int			dsr_req;	/* DSR value is valid */
487 	u32			dsr;	/* optional driver stage (DSR) value */
488 
489 	/* Command Queue Engine (CQE) support */
490 	const struct mmc_cqe_ops *cqe_ops;
491 	void			*cqe_private;
492 	int			cqe_qdepth;
493 	bool			cqe_enabled;
494 	bool			cqe_on;
495 
496 	/* Inline encryption support */
497 #ifdef CONFIG_MMC_CRYPTO
498 	struct blk_crypto_profile crypto_profile;
499 #endif
500 
501 	/* Host Software Queue support */
502 	bool			hsq_enabled;
503 
504 	unsigned long		private[] ____cacheline_aligned;
505 };
506 
507 struct device_node;
508 
509 struct mmc_host *mmc_alloc_host(int extra, struct device *);
510 int mmc_add_host(struct mmc_host *);
511 void mmc_remove_host(struct mmc_host *);
512 void mmc_free_host(struct mmc_host *);
513 void mmc_of_parse_clk_phase(struct mmc_host *host,
514 			    struct mmc_clk_phase_map *map);
515 int mmc_of_parse(struct mmc_host *host);
516 int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask);
517 
mmc_priv(struct mmc_host * host)518 static inline void *mmc_priv(struct mmc_host *host)
519 {
520 	return (void *)host->private;
521 }
522 
mmc_from_priv(void * priv)523 static inline struct mmc_host *mmc_from_priv(void *priv)
524 {
525 	return container_of(priv, struct mmc_host, private);
526 }
527 
528 #define mmc_host_is_spi(host)	((host)->caps & MMC_CAP_SPI)
529 
530 #define mmc_dev(x)	((x)->parent)
531 #define mmc_classdev(x)	(&(x)->class_dev)
532 #define mmc_hostname(x)	(dev_name(&(x)->class_dev))
533 
534 void mmc_detect_change(struct mmc_host *, unsigned long delay);
535 void mmc_request_done(struct mmc_host *, struct mmc_request *);
536 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
537 
538 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
539 
540 /*
541  * May be called from host driver's system/runtime suspend/resume callbacks,
542  * to know if SDIO IRQs has been claimed.
543  */
sdio_irq_claimed(struct mmc_host * host)544 static inline bool sdio_irq_claimed(struct mmc_host *host)
545 {
546 	return host->sdio_irqs > 0;
547 }
548 
mmc_signal_sdio_irq(struct mmc_host * host)549 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
550 {
551 	host->ops->enable_sdio_irq(host, 0);
552 	host->sdio_irq_pending = true;
553 	if (host->sdio_irq_thread)
554 		wake_up_process(host->sdio_irq_thread);
555 }
556 
557 void sdio_signal_irq(struct mmc_host *host);
558 
559 #ifdef CONFIG_REGULATOR
560 int mmc_regulator_set_ocr(struct mmc_host *mmc,
561 			struct regulator *supply,
562 			unsigned short vdd_bit);
563 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
564 #else
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)565 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
566 				 struct regulator *supply,
567 				 unsigned short vdd_bit)
568 {
569 	return 0;
570 }
571 
mmc_regulator_set_vqmmc(struct mmc_host * mmc,struct mmc_ios * ios)572 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
573 					  struct mmc_ios *ios)
574 {
575 	return -EINVAL;
576 }
577 #endif
578 
579 int mmc_regulator_get_supply(struct mmc_host *mmc);
580 
mmc_card_is_removable(struct mmc_host * host)581 static inline int mmc_card_is_removable(struct mmc_host *host)
582 {
583 	return !(host->caps & MMC_CAP_NONREMOVABLE);
584 }
585 
mmc_card_keep_power(struct mmc_host * host)586 static inline int mmc_card_keep_power(struct mmc_host *host)
587 {
588 	return host->pm_flags & MMC_PM_KEEP_POWER;
589 }
590 
mmc_card_wake_sdio_irq(struct mmc_host * host)591 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
592 {
593 	return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
594 }
595 
596 /* TODO: Move to private header */
mmc_card_hs(struct mmc_card * card)597 static inline int mmc_card_hs(struct mmc_card *card)
598 {
599 	return card->host->ios.timing == MMC_TIMING_SD_HS ||
600 		card->host->ios.timing == MMC_TIMING_MMC_HS;
601 }
602 
603 /* TODO: Move to private header */
mmc_card_uhs(struct mmc_card * card)604 static inline int mmc_card_uhs(struct mmc_card *card)
605 {
606 	return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
607 		card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
608 }
609 
610 void mmc_retune_timer_stop(struct mmc_host *host);
611 
mmc_retune_needed(struct mmc_host * host)612 static inline void mmc_retune_needed(struct mmc_host *host)
613 {
614 	if (host->can_retune)
615 		host->need_retune = 1;
616 }
617 
mmc_can_retune(struct mmc_host * host)618 static inline bool mmc_can_retune(struct mmc_host *host)
619 {
620 	return host->can_retune == 1;
621 }
622 
mmc_doing_retune(struct mmc_host * host)623 static inline bool mmc_doing_retune(struct mmc_host *host)
624 {
625 	return host->doing_retune == 1;
626 }
627 
mmc_doing_tune(struct mmc_host * host)628 static inline bool mmc_doing_tune(struct mmc_host *host)
629 {
630 	return host->doing_retune == 1 || host->doing_init_tune == 1;
631 }
632 
mmc_get_dma_dir(struct mmc_data * data)633 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
634 {
635 	return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
636 }
637 
638 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
639 int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode);
640 int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
641 
642 #endif /* LINUX_MMC_HOST_H */
643