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/linux/drivers/clk/uniphier/
A Dclk-uniphier-sys.c27 #define UNIPHIER_LD4_SYS_CLK_NAND(idx) \ argument
31 #define UNIPHIER_PRO5_SYS_CLK_NAND(idx) \ argument
35 #define UNIPHIER_LD11_SYS_CLK_NAND(idx) \ argument
39 #define UNIPHIER_SYS_CLK_NAND_4X(idx) \ argument
42 #define UNIPHIER_LD11_SYS_CLK_EMMC(idx) \ argument
45 #define UNIPHIER_LD4_SYS_CLK_STDMAC(idx) \ argument
51 #define UNIPHIER_LD11_SYS_CLK_HSC(idx) \ argument
54 #define UNIPHIER_PRO4_SYS_CLK_GIO(idx) \ argument
60 #define UNIPHIER_PRO4_SYS_CLK_AIO(idx) \ argument
64 #define UNIPHIER_PRO5_SYS_CLK_AIO(idx) \ argument
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A Dclk-uniphier-peri.c9 #define UNIPHIER_PERI_CLK_UART(idx, ch) \ argument
15 #define UNIPHIER_PERI_CLK_I2C(idx, ch) \ argument
18 #define UNIPHIER_PERI_CLK_FI2C(idx, ch) \ argument
21 #define UNIPHIER_PERI_CLK_SCSSI(idx, ch) \ argument
24 #define UNIPHIER_PERI_CLK_MCSSI(idx) \ argument
/linux/drivers/net/ethernet/huawei/hinic/
A Dhinic_hw_csr.h21 #define HINIC_CSR_DMA_ATTR_ADDR(idx) \ argument
27 #define HINIC_CSR_PPF_ELECTION_ADDR(idx) \ argument
35 #define HINIC_CSR_API_CMD_CHAIN_HEAD_HI_ADDR(idx) \ argument
38 #define HINIC_CSR_API_CMD_CHAIN_HEAD_LO_ADDR(idx) \ argument
41 #define HINIC_CSR_API_CMD_STATUS_HI_ADDR(idx) \ argument
44 #define HINIC_CSR_API_CMD_STATUS_LO_ADDR(idx) \ argument
47 #define HINIC_CSR_API_CMD_CHAIN_NUM_CELLS_ADDR(idx) \ argument
50 #define HINIC_CSR_API_CMD_CHAIN_CTRL_ADDR(idx) \ argument
53 #define HINIC_CSR_API_CMD_CHAIN_PI_ADDR(idx) \ argument
56 #define HINIC_CSR_API_CMD_CHAIN_REQ_ADDR(idx) \ argument
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/linux/include/asm-generic/
A Dfixmap.h30 static __always_inline unsigned long fix_to_virt(const unsigned int idx) in fix_to_virt()
64 #define set_fixmap(idx, phys) \ argument
69 #define clear_fixmap(idx) \ argument
74 #define __set_fixmap_offset(idx, phys, flags) \ argument
82 #define set_fixmap_offset(idx, phys) \ argument
88 #define set_fixmap_nocache(idx, phys) \ argument
91 #define set_fixmap_offset_nocache(idx, phys) \ argument
97 #define set_fixmap_io(idx, phys) \ argument
100 #define set_fixmap_offset_io(idx, phys) \ argument
/linux/mm/
A Dhugetlb_cgroup.c78 int idx; in hugetlb_cgroup_have_usage() local
91 int idx; in hugetlb_cgroup_init() local
199 int idx; in hugetlb_cgroup_css_offline() local
271 int hugetlb_cgroup_charge_cgroup(int idx, unsigned long nr_pages, in hugetlb_cgroup_charge_cgroup()
295 void hugetlb_cgroup_commit_charge(int idx, unsigned long nr_pages, in hugetlb_cgroup_commit_charge()
455 int idx; in hugetlb_cgroup_read_u64_max() local
499 int ret, idx; in hugetlb_cgroup_write() local
588 int idx; in __hugetlb_events_show() local
615 static void __init __hugetlb_cgroup_file_dfl_init(int idx) in __hugetlb_cgroup_file_dfl_init()
679 static void __init __hugetlb_cgroup_file_legacy_init(int idx) in __hugetlb_cgroup_file_legacy_init()
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/linux/drivers/net/ethernet/ibm/emac/
A Drgmii.c34 #define RGMII_FER_MASK(idx) (0x7 << ((idx) * 4)) argument
35 #define RGMII_FER_RTBI(idx) (0x4 << ((idx) * 4)) argument
36 #define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4)) argument
37 #define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4)) argument
38 #define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4)) argument
39 #define RGMII_FER_MII(idx) RGMII_FER_GMII(idx) argument
42 #define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8)) argument
43 #define RGMII_SSR_10(idx) (0x1 << ((idx) * 8)) argument
44 #define RGMII_SSR_100(idx) (0x2 << ((idx) * 8)) argument
45 #define RGMII_SSR_1000(idx) (0x4 << ((idx) * 8)) argument
A Dzmii.c29 #define ZMII_FER_MDI(idx) (0x80000000 >> ((idx) * 4)) argument
33 #define ZMII_FER_SMII(idx) (0x40000000 >> ((idx) * 4)) argument
34 #define ZMII_FER_RMII(idx) (0x20000000 >> ((idx) * 4)) argument
35 #define ZMII_FER_MII(idx) (0x10000000 >> ((idx) * 4)) argument
38 #define ZMII_SSR_SCI(idx) (0x40000000 >> ((idx) * 4)) argument
39 #define ZMII_SSR_FSS(idx) (0x20000000 >> ((idx) * 4)) argument
40 #define ZMII_SSR_SP(idx) (0x10000000 >> ((idx) * 4)) argument
/linux/arch/x86/crypto/
A Dsha512-avx-asm.S130 idx = \rnd define
171 idx = \rnd - 2 define
173 idx = \rnd - 15 define
186 idx = \rnd define
226 idx = \rnd - 16 define
228 idx = \rnd - 7 define
235 idx = \rnd + 1 define
247 idx = \rnd define
A Dsha512-ssse3-asm.S124 idx = \rnd define
170 idx = \rnd -2 define
176 idx = \rnd define
178 idx = \rnd - 15 define
222 idx = \rnd + 1 define
243 idx = \rnd - 7 define
259 idx = \rnd define
/linux/arch/x86/um/
A Dtls_32.c66 int idx; in get_free_idx() local
95 int idx; in load_TLS() local
204 int idx, int flushed) in set_tls_entry()
221 int idx, ret = -EFAULT; in arch_set_tls() local
239 int idx) in get_tls_entry()
280 int idx, ret; in SYSCALL_DEFINE1() local
311 int ptrace_set_thread_area(struct task_struct *child, int idx, in ptrace_set_thread_area()
328 int idx, ret; in SYSCALL_DEFINE1() local
350 int ptrace_get_thread_area(struct task_struct *child, int idx, in ptrace_get_thread_area()
/linux/arch/sh/kernel/cpu/sh4a/
A Dubc.c15 #define UBC_CBR(idx) (0xff200000 + (0x20 * idx)) argument
16 #define UBC_CRR(idx) (0xff200004 + (0x20 * idx)) argument
17 #define UBC_CAR(idx) (0xff200008 + (0x20 * idx)) argument
18 #define UBC_CAMR(idx) (0xff20000c + (0x20 * idx)) argument
32 static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_enable()
38 static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_disable()
A Dclock-sh7780.c33 int idx = (__raw_readl(FRQCR) & 0x0003); in module_clk_recalc() local
43 int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007); in bus_clk_recalc() local
53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001); in cpu_clk_recalc() local
68 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops()
76 int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007); in shyway_clk_recalc() local
/linux/drivers/input/misc/
A Dad714x.c291 static void ad714x_slider_cal_abs_pos(struct ad714x_chip *ad714x, int idx) in ad714x_slider_cal_abs_pos()
313 static void ad714x_slider_cal_flt_pos(struct ad714x_chip *ad714x, int idx) in ad714x_slider_cal_flt_pos()
449 static void ad714x_wheel_cal_abs_pos(struct ad714x_chip *ad714x, int idx) in ad714x_wheel_cal_abs_pos()
480 static void ad714x_wheel_cal_flt_pos(struct ad714x_chip *ad714x, int idx) in ad714x_wheel_cal_flt_pos()
496 static void ad714x_wheel_use_com_int(struct ad714x_chip *ad714x, int idx) in ad714x_wheel_use_com_int()
574 static void touchpad_cal_sensor_val(struct ad714x_chip *ad714x, int idx) in touchpad_cal_sensor_val()
654 static void touchpad_cal_abs_pos(struct ad714x_chip *ad714x, int idx) in touchpad_cal_abs_pos()
668 static void touchpad_cal_flt_pos(struct ad714x_chip *ad714x, int idx) in touchpad_cal_flt_pos()
699 static int touchpad_check_endpoint(struct ad714x_chip *ad714x, int idx) in touchpad_check_endpoint()
776 static void touchpad_use_com_int(struct ad714x_chip *ad714x, int idx) in touchpad_use_com_int()
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/linux/arch/sh/kernel/cpu/sh3/
A Dclock-sh3.c29 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
41 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
53 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
81 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops()
A Dclock-sh7706.c25 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
37 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
49 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
61 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
77 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops()
A Dclock-sh7709.c25 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
37 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
49 int idx = (frqcr & 0x0080) ? in bus_clk_recalc() local
62 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
78 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops()
A Dclock-sh7710.c35 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
45 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; in bus_clk_recalc() local
55 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; in cpu_clk_recalc() local
70 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops()
A Dclock-sh7712.c24 int idx = (frqcr & 0x0300) >> 8; in master_clk_init() local
36 int idx = frqcr & 0x0007; in module_clk_recalc() local
48 int idx = (frqcr & 0x0030) >> 4; in cpu_clk_recalc() local
63 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops()
/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_hw_sspp.c173 u32 idx; in dpu_hw_sspp_setup_multirect() local
200 u32 idx; in _sspp_setup_opmode() local
221 u32 idx; in _sspp_setup_csc10_opmode() local
248 u32 idx; in dpu_hw_sspp_setup_format() local
364 u32 idx; in dpu_hw_sspp_setup_pe_config() local
419 u32 idx; in _dpu_hw_sspp_setup_scaler3() local
434 u32 idx; in _dpu_hw_sspp_get_scaler3_ver() local
452 u32 idx; in dpu_hw_sspp_setup_rects() local
519 u32 idx; in dpu_hw_sspp_setup_sourceaddress() local
544 u32 idx; in dpu_hw_sspp_setup_csc() local
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/linux/tools/testing/selftests/kvm/lib/
A Dsparsebit.c805 static void bit_set(struct sparsebit *s, sparsebit_idx_t idx) in bit_set()
986 sparsebit_idx_t idx, sparsebit_num_t num) in sparsebit_is_set_num()
1010 sparsebit_idx_t idx) in sparsebit_is_clear()
1017 sparsebit_idx_t idx, sparsebit_num_t num) in sparsebit_is_clear_num()
1252 sparsebit_idx_t idx; in sparsebit_next_clear() local
1307 sparsebit_idx_t idx; in sparsebit_next_set_num() local
1342 sparsebit_idx_t idx; in sparsebit_next_clear_num() local
1376 sparsebit_idx_t idx; in sparsebit_set_num() local
1458 sparsebit_idx_t idx; in sparsebit_clear_num() local
1522 void sparsebit_set(struct sparsebit *s, sparsebit_idx_t idx) in sparsebit_set()
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/linux/drivers/net/ethernet/chelsio/cxgb/
A Dfpga_defs.h215 #define MAC_REG_ADDR(idx, reg) (MAC_REG_BASE + (idx) * 128 + (reg)) argument
217 #define MAC_REG_IDLO(idx) MAC_REG_ADDR(idx, A_GMAC_MACID_LO) argument
218 #define MAC_REG_IDHI(idx) MAC_REG_ADDR(idx, A_GMAC_MACID_HI) argument
219 #define MAC_REG_CSR(idx) MAC_REG_ADDR(idx, A_GMAC_CSR) argument
220 #define MAC_REG_IFS(idx) MAC_REG_ADDR(idx, A_GMAC_IFS) argument
222 #define MAC_REG_LINKDLY(idx) MAC_REG_ADDR(idx, A_GMAC_LNK_DLY) argument
223 #define MAC_REG_PAUSETIME(idx) MAC_REG_ADDR(idx, A_GMAC_PAUSETIME) argument
224 #define MAC_REG_CASTLO(idx) MAC_REG_ADDR(idx, A_GMAC_MCAST_LO) argument
225 #define MAC_REG_MCASTHI(idx) MAC_REG_ADDR(idx, A_GMAC_MCAST_HI) argument
228 #define MAC_REG_RMCNT(idx) MAC_REG_ADDR(idx, A_GMAC_RMT_CNT) argument
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dgk104.c145 read_clk(struct gk104_clk *clk, int idx) in read_clk()
223 calc_div(struct gk104_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv) in calc_div()
263 calc_pll(struct gk104_clk *clk, int idx, u32 freq, u32 *coef) in calc_pll()
288 struct nvkm_cstate *cstate, int idx, int dom) in calc_clk()
357 gk104_clk_prog_0(struct gk104_clk *clk, int idx) in gk104_clk_prog_0()
368 gk104_clk_prog_1_0(struct gk104_clk *clk, int idx) in gk104_clk_prog_1_0()
379 gk104_clk_prog_1_1(struct gk104_clk *clk, int idx) in gk104_clk_prog_1_1()
386 gk104_clk_prog_2(struct gk104_clk *clk, int idx) in gk104_clk_prog_2()
411 gk104_clk_prog_3(struct gk104_clk *clk, int idx) in gk104_clk_prog_3()
422 gk104_clk_prog_4_0(struct gk104_clk *clk, int idx) in gk104_clk_prog_4_0()
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/linux/arch/arm/mach-omap2/
A Dcm2xxx_3xxx.h50 static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx) in omap2_cm_read_mod_reg()
55 static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) in omap2_cm_write_mod_reg()
62 s16 idx) in omap2_cm_rmw_mod_reg_bits()
75 static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) in omap2_cm_read_mod_bits_shift()
86 static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) in omap2_cm_set_mod_reg_bits()
91 static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) in omap2_cm_clear_mod_reg_bits()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
A Ddisp.c59 nvbios_disp_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub) in nvbios_disp_entry()
70 nvbios_disp_parse(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub, in nvbios_disp_parse()
82 nvbios_outp_entry(struct nvkm_bios *bios, u8 idx, in nvbios_outp_entry()
96 nvbios_outp_parse(struct nvkm_bios *bios, u8 idx, in nvbios_outp_parse()
119 u16 data, idx = 0; in nvbios_outp_match() local
130 nvbios_ocfg_entry(struct nvkm_bios *bios, u16 outp, u8 idx, in nvbios_ocfg_entry()
139 nvbios_ocfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx, in nvbios_ocfg_parse()
156 u16 data, idx = 0; in nvbios_ocfg_match() local
/linux/arch/sh/kernel/cpu/sh4/
A Dclock-sh4.c37 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
47 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007; in bus_clk_recalc() local
57 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007; in cpu_clk_recalc() local
72 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops()

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