1 /*
2  * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #include <imx_regs.h>
7 #include <imx_clock.h>
8 
imx7_clock_uart_init(void)9 static void imx7_clock_uart_init(void)
10 {
11 	unsigned int i;
12 
13 	for (i = 0; i < MXC_MAX_UART_NUM; i++)
14 		imx_clock_disable_uart(i);
15 }
16 
imx7_clock_wdog_init(void)17 static void imx7_clock_wdog_init(void)
18 {
19 	unsigned int i;
20 
21 	for (i = 0; i < MXC_MAX_WDOG_NUM; i++)
22 		imx_clock_disable_wdog(i);
23 }
24 
imx7_clock_usb_init(void)25 static void imx7_clock_usb_init(void)
26 {
27 	/* Disable the clock root */
28 	imx_clock_target_clr(CCM_TRT_ID_USB_HSIC_CLK_ROOT, 0xFFFFFFFF);
29 }
30 
imx_clock_init(void)31 void imx_clock_init(void)
32 {
33 	/*
34 	 * The BootROM hands off to the next stage with the internal 24 MHz XTAL
35 	 * crystal already clocking the main PLL, which is very handy.
36 	 * Here we should enable whichever peripherals are required for ATF and
37 	 * OPTEE.
38 	 *
39 	 * Subsequent stages in the boot process such as u-boot and Linux
40 	 * already have a significant and mature code-base around clocks, so our
41 	 * objective should be to enable what we need for ATF/OPTEE without
42 	 * breaking any existing upstream code in Linux and u-boot.
43 	 */
44 
45 	/* Initialize UART clocks */
46 	imx7_clock_uart_init();
47 
48 	/* Watchdog clocks */
49 
50 	imx7_clock_wdog_init();
51 
52 	/* USB clocks */
53 	imx7_clock_usb_init();
54 
55 }
56