1 #include <xen/irq.h>
2 #include <xen/sched.h>
3 #include <asm/current.h>
4 #include <asm/smp.h>
5 #include <asm/hardirq.h>
6 #include <mach_apic.h>
7 
8 /*
9  * LOGICAL FLAT DELIVERY MODE (multicast via bitmask to <= 8 logical APIC IDs).
10  */
11 
init_apic_ldr_flat(void)12 void init_apic_ldr_flat(void)
13 {
14 	unsigned long val;
15 
16 	apic_write(APIC_DFR, APIC_DFR_FLAT);
17 	val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
18 	val |= SET_xAPIC_LOGICAL_ID(1UL << smp_processor_id());
19 	apic_write(APIC_LDR, val);
20 }
21 
clustered_apic_check_flat(void)22 void __init clustered_apic_check_flat(void)
23 {
24 	printk("Enabling APIC mode:  Flat.  Using %d I/O APICs\n", nr_ioapics);
25 }
26 
vector_allocation_cpumask_flat(int cpu)27 const cpumask_t *vector_allocation_cpumask_flat(int cpu)
28 {
29 	return &cpu_online_map;
30 }
31 
cpu_mask_to_apicid_flat(const cpumask_t * cpumask)32 unsigned int cpu_mask_to_apicid_flat(const cpumask_t *cpumask)
33 {
34 	return cpumask_bits(cpumask)[0]&0xFF;
35 }
36 
37 /*
38  * PHYSICAL DELIVERY MODE (unicast to physical APIC IDs).
39  */
40 
init_apic_ldr_phys(void)41 void init_apic_ldr_phys(void)
42 {
43 	/* We only deliver in phys mode - no setup needed. */
44 }
45 
clustered_apic_check_phys(void)46 void __init clustered_apic_check_phys(void)
47 {
48 	printk("Enabling APIC mode:  Phys.  Using %d I/O APICs\n", nr_ioapics);
49 }
50 
vector_allocation_cpumask_phys(int cpu)51 const cpumask_t *vector_allocation_cpumask_phys(int cpu)
52 {
53 	return cpumask_of(cpu);
54 }
55 
cpu_mask_to_apicid_phys(const cpumask_t * cpumask)56 unsigned int cpu_mask_to_apicid_phys(const cpumask_t *cpumask)
57 {
58 	/* As we are using single CPU as destination, pick only one CPU here */
59 	return cpu_physical_id(cpumask_any(cpumask));
60 }
61