Searched defs:inst_idx (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | vcn_v2_5.c | 435 static void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v2_5_mc_resume_dpg_mode()
649 uint8_t sram_sel, int inst_idx, uint8_t indirect) in vcn_v2_5_clock_gating_dpg_mode()
758 static int vcn_v2_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v2_5_start_dpg_mode()
1291 static int vcn_v2_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) in vcn_v2_5_stop_dpg_mode()
1388 int inst_idx, struct dpg_pause_state *new_state) in vcn_v2_5_pause_dpg_mode()
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| A D | amdgpu_vcn.h | 81 #define RREG32_SOC15_DPG_MODE_1_0(ip, inst_idx, reg, mask, sram_sel) \ argument
91 #define WREG32_SOC15_DPG_MODE_1_0(ip, inst_idx, reg, value, mask, sram_sel) \ argument
102 #define SOC15_DPG_MODE_OFFSET(ip, inst_idx, reg) \ argument
135 #define RREG32_SOC15_DPG_MODE(inst_idx, offset, mask_en) \ argument
144 #define WREG32_SOC15_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \ argument
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| A D | vcn_v3_0.c | 480 static void vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v3_0_mc_resume_dpg_mode()
809 uint8_t sram_sel, int inst_idx, uint8_t indirect) in vcn_v3_0_clock_gating_dpg_mode()
924 static int vcn_v3_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v3_0_start_dpg_mode()
1475 static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) in vcn_v3_0_stop_dpg_mode()
1579 int inst_idx, struct dpg_pause_state *new_state) in vcn_v3_0_pause_dpg_mode()
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| A D | vcn_v1_0.c | 1206 int inst_idx, struct dpg_pause_state *new_state) in vcn_v1_0_pause_dpg_mode()
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| A D | vcn_v2_0.c | 1192 int inst_idx, struct dpg_pause_state *new_state) in vcn_v2_0_pause_dpg_mode()
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| A D | amdgpu_psp.c | 2728 int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx, in psp_update_vcn_sram()
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