1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2019 Intel Corporation
4 */
5
6 #include <linux/pci.h>
7 #include <linux/vgaarb.h>
8
9 #include <drm/i915_drm.h>
10
11 #include "i915_drv.h"
12 #include "intel_de.h"
13 #include "intel_vga.h"
14
intel_vga_cntrl_reg(struct drm_i915_private * i915)15 static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
16 {
17 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
18 return VLV_VGACNTRL;
19 else if (DISPLAY_VER(i915) >= 5)
20 return CPU_VGACNTRL;
21 else
22 return VGACNTRL;
23 }
24
25 /* Disable the VGA plane that we never use */
intel_vga_disable(struct drm_i915_private * dev_priv)26 void intel_vga_disable(struct drm_i915_private *dev_priv)
27 {
28 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
29 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
30 u8 sr1;
31
32 if (intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)
33 return;
34
35 /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
36 vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
37 outb(SR01, VGA_SR_INDEX);
38 sr1 = inb(VGA_SR_DATA);
39 outb(sr1 | 1 << 5, VGA_SR_DATA);
40 vga_put(pdev, VGA_RSRC_LEGACY_IO);
41 udelay(300);
42
43 intel_de_write(dev_priv, vga_reg, VGA_DISP_DISABLE);
44 intel_de_posting_read(dev_priv, vga_reg);
45 }
46
intel_vga_redisable_power_on(struct drm_i915_private * dev_priv)47 void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
48 {
49 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
50
51 if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) {
52 drm_dbg_kms(&dev_priv->drm,
53 "Something enabled VGA plane, disabling it\n");
54 intel_vga_disable(dev_priv);
55 }
56 }
57
intel_vga_redisable(struct drm_i915_private * i915)58 void intel_vga_redisable(struct drm_i915_private *i915)
59 {
60 intel_wakeref_t wakeref;
61
62 /*
63 * This function can be called both from intel_modeset_setup_hw_state or
64 * at a very early point in our resume sequence, where the power well
65 * structures are not yet restored. Since this function is at a very
66 * paranoid "someone might have enabled VGA while we were not looking"
67 * level, just check if the power well is enabled instead of trying to
68 * follow the "don't touch the power well if we don't need it" policy
69 * the rest of the driver uses.
70 */
71 wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
72 if (!wakeref)
73 return;
74
75 intel_vga_redisable_power_on(i915);
76
77 intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
78 }
79
intel_vga_reset_io_mem(struct drm_i915_private * i915)80 void intel_vga_reset_io_mem(struct drm_i915_private *i915)
81 {
82 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
83
84 /*
85 * After we re-enable the power well, if we touch VGA register 0x3d5
86 * we'll get unclaimed register interrupts. This stops after we write
87 * anything to the VGA MSR register. The vgacon module uses this
88 * register all the time, so if we unbind our driver and, as a
89 * consequence, bind vgacon, we'll get stuck in an infinite loop at
90 * console_unlock(). So make here we touch the VGA MSR register, making
91 * sure vgacon can keep working normally without triggering interrupts
92 * and error messages.
93 */
94 vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
95 outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
96 vga_put(pdev, VGA_RSRC_LEGACY_IO);
97 }
98
99 static int
intel_vga_set_state(struct drm_i915_private * i915,bool enable_decode)100 intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
101 {
102 unsigned int reg = DISPLAY_VER(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
103 u16 gmch_ctrl;
104
105 if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
106 drm_err(&i915->drm, "failed to read control word\n");
107 return -EIO;
108 }
109
110 if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
111 return 0;
112
113 if (enable_decode)
114 gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
115 else
116 gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
117
118 if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
119 drm_err(&i915->drm, "failed to write control word\n");
120 return -EIO;
121 }
122
123 return 0;
124 }
125
126 static unsigned int
intel_vga_set_decode(struct pci_dev * pdev,bool enable_decode)127 intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
128 {
129 struct drm_i915_private *i915 = pdev_to_i915(pdev);
130
131 intel_vga_set_state(i915, enable_decode);
132
133 if (enable_decode)
134 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
135 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
136 else
137 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
138 }
139
intel_vga_register(struct drm_i915_private * i915)140 int intel_vga_register(struct drm_i915_private *i915)
141 {
142
143 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
144 int ret;
145
146 /*
147 * If we have > 1 VGA cards, then we need to arbitrate access to the
148 * common VGA resources.
149 *
150 * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
151 * then we do not take part in VGA arbitration and the
152 * vga_client_register() fails with -ENODEV.
153 */
154 ret = vga_client_register(pdev, intel_vga_set_decode);
155 if (ret && ret != -ENODEV)
156 return ret;
157
158 return 0;
159 }
160
intel_vga_unregister(struct drm_i915_private * i915)161 void intel_vga_unregister(struct drm_i915_private *i915)
162 {
163 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
164
165 vga_client_unregister(pdev);
166 }
167