Searched defs:mdiv (Results 1 – 11 of 11) sorted by relevance
/u-boot/arch/arm/mach-socfpga/ |
A D | clock_manager_s10.c | 44 u32 mdiv, refclkdiv, mscnt, hscnt, vcocalib; in cm_basic_init() local 201 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_main_vco_clk_hz() local 232 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_per_vco_clk_hz() local
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/u-boot/drivers/clk/exynos/ |
A D | clk-pll.c | 22 unsigned long mdiv, sdiv, pdiv; in pll145x_get_rate() local
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/u-boot/drivers/clk/imx/ |
A D | clk-pll14xx.c | 72 u32 mdiv, pdiv, sdiv, pll_div; in clk_pll1416x_recalc_rate() local 89 u32 mdiv, pdiv, sdiv, pll_div_ctl0, pll_div_ctl1; in clk_pll1443x_recalc_rate() local
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A D | clk.h | 32 unsigned int mdiv; member
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/u-boot/drivers/clk/altera/ |
A D | clk-agilex.c | 204 u32 mdiv, refclkdiv, arefclkdiv, drefclkdiv, mscnt, hscnt, vcocalib; in calc_vocalib_pll() local 349 u64 fref, arefdiv, mdiv, reg, vco; in clk_get_vco_clk_hz() local
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/u-boot/drivers/i2c/ |
A D | octeon_i2c.c | 616 int ndiv, mdiv; in twsi_calc_div() local
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/u-boot/board/samsung/trats/ |
A D | setup.h | 229 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
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/u-boot/arch/arm/mach-exynos/ |
A D | exynos4_setup.h | 340 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
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A D | exynos5_setup.h | 22 #define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv) argument
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/u-boot/arch/arm/include/asm/arch-tegra/ |
A D | bpmp_abi.h | 1367 uint16_t mdiv; /**< input divider value */ member
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/u-boot/arch/arm/include/asm/arch-imx8m/ |
A D | clock_imx8mm.h | 40 int mdiv; member
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