1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
4  *
5  * Copyright (C) 2014 Google Inc.
6  * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
7  */
8 
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <fdtdec.h>
13 #include <log.h>
14 #include <malloc.h>
15 #include <net.h>
16 #include <spi.h>
17 #include <spi_flash.h>
18 #include <asm/global_data.h>
19 #include <asm/mrccache.h>
20 #include <dm/device-internal.h>
21 #include <dm/uclass-internal.h>
22 
23 DECLARE_GLOBAL_DATA_PTR;
24 
mrc_block_size(uint data_size)25 static uint mrc_block_size(uint data_size)
26 {
27 	uint mrc_size = sizeof(struct mrc_data_container) + data_size;
28 
29 	return ALIGN(mrc_size, MRC_DATA_ALIGN);
30 }
31 
next_mrc_block(struct mrc_data_container * cache)32 static struct mrc_data_container *next_mrc_block(
33 	struct mrc_data_container *cache)
34 {
35 	/* MRC data blocks are aligned within the region */
36 	u8 *region_ptr = (u8 *)cache;
37 
38 	region_ptr += mrc_block_size(cache->data_size);
39 
40 	return (struct mrc_data_container *)region_ptr;
41 }
42 
is_mrc_cache(struct mrc_data_container * cache)43 static int is_mrc_cache(struct mrc_data_container *cache)
44 {
45 	return cache && (cache->signature == MRC_DATA_SIGNATURE);
46 }
47 
mrccache_find_current(struct mrc_region * entry)48 struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
49 {
50 	struct mrc_data_container *cache, *next;
51 	ulong base_addr, end_addr;
52 	uint id;
53 
54 	base_addr = entry->base + entry->offset;
55 	end_addr = base_addr + entry->length;
56 	cache = NULL;
57 
58 	/* Search for the last filled entry in the region */
59 	for (id = 0, next = (struct mrc_data_container *)base_addr;
60 	     is_mrc_cache(next);
61 	     id++) {
62 		cache = next;
63 		next = next_mrc_block(next);
64 		if ((ulong)next >= end_addr)
65 			break;
66 	}
67 
68 	if (id-- == 0) {
69 		debug("%s: No valid MRC cache found.\n", __func__);
70 		return NULL;
71 	}
72 
73 	/* Verify checksum */
74 	if (cache->checksum != compute_ip_checksum(cache->data,
75 						   cache->data_size)) {
76 		printf("%s: MRC cache checksum mismatch\n", __func__);
77 		return NULL;
78 	}
79 
80 	debug("%s: picked entry %u from cache block\n", __func__, id);
81 
82 	return cache;
83 }
84 
85 /**
86  * find_next_mrc_cache() - get next cache entry
87  *
88  * This moves to the next cache entry in the region, making sure it has enough
89  * space to hold data of size @data_size.
90  *
91  * @entry:	MRC cache flash area
92  * @cache:	Entry to start from
93  * @data_size:	Required data size of the new entry. Note that we assume that
94  *	all cache entries are the same size
95  *
96  * @return next cache entry if found, NULL if we got to the end
97  */
find_next_mrc_cache(struct mrc_region * entry,struct mrc_data_container * prev,int data_size)98 static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
99 		struct mrc_data_container *prev, int data_size)
100 {
101 	struct mrc_data_container *cache;
102 	ulong base_addr, end_addr;
103 
104 	base_addr = entry->base + entry->offset;
105 	end_addr = base_addr + entry->length;
106 
107 	/*
108 	 * We assume that all cache entries are the same size, but let's use
109 	 * data_size here for clarity.
110 	 */
111 	cache = next_mrc_block(prev);
112 	if ((ulong)cache + mrc_block_size(data_size) > end_addr) {
113 		/* Crossed the boundary */
114 		cache = NULL;
115 		debug("%s: no available entries found\n", __func__);
116 	} else {
117 		debug("%s: picked next entry from cache block at %p\n",
118 		      __func__, cache);
119 	}
120 
121 	return cache;
122 }
123 
124 /**
125  * mrccache_update() - update the MRC cache with a new record
126  *
127  * This writes a new record to the end of the MRC cache region. If the new
128  * record is the same as the latest record then the write is skipped
129  *
130  * @sf:		SPI flash to write to
131  * @entry:	Position and size of MRC cache in SPI flash
132  * @cur:	Record to write
133  * @return 0 if updated, -EEXIST if the record is the same as the latest
134  * record, -EINVAL if the record is not valid, other error if SPI write failed
135  */
mrccache_update(struct udevice * sf,struct mrc_region * entry,struct mrc_data_container * cur)136 static int mrccache_update(struct udevice *sf, struct mrc_region *entry,
137 			   struct mrc_data_container *cur)
138 {
139 	struct mrc_data_container *cache;
140 	ulong offset;
141 	ulong base_addr;
142 	int ret;
143 
144 	if (!is_mrc_cache(cur)) {
145 		debug("%s: Cache data not valid\n", __func__);
146 		return -EINVAL;
147 	}
148 
149 	/* Find the last used block */
150 	base_addr = entry->base + entry->offset;
151 	debug("Updating MRC cache data\n");
152 	cache = mrccache_find_current(entry);
153 	if (cache && (cache->data_size == cur->data_size) &&
154 	    (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
155 		debug("MRC data in flash is up to date. No update\n");
156 		return -EEXIST;
157 	}
158 
159 	/* Move to the next block, which will be the first unused block */
160 	if (cache)
161 		cache = find_next_mrc_cache(entry, cache, cur->data_size);
162 
163 	/*
164 	 * If we have got to the end, erase the entire mrc-cache area and start
165 	 * again at block 0.
166 	 */
167 	if (!cache) {
168 		debug("Erasing the MRC cache region of %x bytes at %x\n",
169 		      entry->length, entry->offset);
170 
171 		ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
172 		if (ret) {
173 			debug("Failed to erase flash region\n");
174 			return ret;
175 		}
176 		cache = (struct mrc_data_container *)base_addr;
177 	}
178 
179 	/* Write the data out */
180 	offset = (ulong)cache - base_addr + entry->offset;
181 	debug("Write MRC cache update to flash at %lx\n", offset);
182 	ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
183 				 cur);
184 	if (ret) {
185 		debug("Failed to write to SPI flash\n");
186 		return log_msg_ret("Cannot update mrccache", ret);
187 	}
188 
189 	return 0;
190 }
191 
mrccache_setup(struct mrc_output * mrc,void * data)192 static void mrccache_setup(struct mrc_output *mrc, void *data)
193 {
194 	struct mrc_data_container *cache = data;
195 	u16 checksum;
196 
197 	cache->signature = MRC_DATA_SIGNATURE;
198 	cache->data_size = mrc->len;
199 	checksum = compute_ip_checksum(mrc->buf, cache->data_size);
200 	debug("Saving %d bytes for MRC output data, checksum %04x\n",
201 	      cache->data_size, checksum);
202 	cache->checksum = checksum;
203 	cache->reserved = 0;
204 	memcpy(cache->data, mrc->buf, cache->data_size);
205 
206 	mrc->cache = cache;
207 }
208 
mrccache_reserve(void)209 int mrccache_reserve(void)
210 {
211 	int i;
212 
213 	for (i = 0; i < MRC_TYPE_COUNT; i++) {
214 		struct mrc_output *mrc = &gd->arch.mrc[i];
215 
216 		if (!mrc->len)
217 			continue;
218 
219 		/* adjust stack pointer to store pure cache data plus header */
220 		gd->start_addr_sp -= (mrc->len + MRC_DATA_HEADER_SIZE);
221 		mrccache_setup(mrc, (void *)gd->start_addr_sp);
222 
223 		gd->start_addr_sp &= ~0xf;
224 	}
225 
226 	return 0;
227 }
228 
mrccache_get_region(enum mrc_type_t type,struct udevice ** devp,struct mrc_region * entry)229 int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
230 			struct mrc_region *entry)
231 {
232 	struct udevice *dev;
233 	ofnode mrc_node;
234 	ulong map_base;
235 	uint map_size;
236 	uint offset;
237 	ofnode node;
238 	u32 reg[2];
239 	int ret;
240 
241 	/*
242 	 * Find the flash chip within the SPI controller node. Avoid probing
243 	 * the device here since it may put it into a strange state where the
244 	 * memory map cannot be read.
245 	 */
246 	ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
247 	if (ret || !dev) {
248 		/*
249 		 * Fall back to searching the device tree since driver model
250 		 * may not be ready yet (e.g. with FSPv1)
251 		 */
252 		node = ofnode_by_compatible(ofnode_null(), "jedec,spi-nor");
253 		if (!ofnode_valid(node))
254 			return log_msg_ret("Cannot find SPI flash\n", -ENOENT);
255 		ret = -ENODEV;
256 	} else {
257 		ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
258 		if (!ret)
259 			entry->base = map_base;
260 		node = dev_ofnode(dev);
261 	}
262 
263 	/*
264 	 * At this point we have entry->base if ret == 0. If not, then we have
265 	 * the node and can look for memory-map
266 	 */
267 	if (ret) {
268 		ret = ofnode_read_u32_array(node, "memory-map", reg, 2);
269 		if (ret)
270 			return log_msg_ret("Cannot find memory map\n", ret);
271 		entry->base = reg[0];
272 	}
273 
274 	/* Find the place where we put the MRC cache */
275 	mrc_node = ofnode_find_subnode(node, type == MRC_TYPE_NORMAL ?
276 				       "rw-mrc-cache" : "rw-var-mrc-cache");
277 	if (!ofnode_valid(mrc_node))
278 		return log_msg_ret("Cannot find node", -EPERM);
279 
280 	ret = ofnode_read_u32_array(mrc_node, "reg", reg, 2);
281 	if (ret)
282 		return log_msg_ret("Cannot find address", ret);
283 	entry->offset = reg[0];
284 	entry->length = reg[1];
285 
286 	if (devp)
287 		*devp = dev;
288 	debug("MRC cache type %d in '%s', offset %x, len %x, base %x\n",
289 	      type, dev ? dev->name : ofnode_get_name(node), entry->offset,
290 	      entry->length, entry->base);
291 
292 	return 0;
293 }
294 
mrccache_save_type(enum mrc_type_t type)295 static int mrccache_save_type(enum mrc_type_t type)
296 {
297 	struct mrc_data_container *cache;
298 	struct mrc_output *mrc;
299 	struct mrc_region entry;
300 	struct udevice *sf;
301 	int ret;
302 
303 	mrc = &gd->arch.mrc[type];
304 	if (!mrc->len)
305 		return 0;
306 	log_debug("Saving %#x bytes of MRC output data type %d to SPI flash\n",
307 		  mrc->len, type);
308 	ret = mrccache_get_region(type, &sf, &entry);
309 	if (ret)
310 		return log_msg_ret("Cannot get region", ret);
311 	ret = device_probe(sf);
312 	if (ret)
313 		return log_msg_ret("Cannot probe device", ret);
314 	cache = mrc->cache;
315 
316 	ret = mrccache_update(sf, &entry, cache);
317 	if (!ret)
318 		debug("Saved MRC data with checksum %04x\n", cache->checksum);
319 	else if (ret == -EEXIST)
320 		debug("MRC data is the same as last time, skipping save\n");
321 
322 	return 0;
323 }
324 
mrccache_save(void)325 int mrccache_save(void)
326 {
327 	int i;
328 
329 	for (i = 0; i < MRC_TYPE_COUNT; i++) {
330 		int ret;
331 
332 		ret = mrccache_save_type(i);
333 		if (ret)
334 			return ret;
335 	}
336 
337 	return 0;
338 }
339 
mrccache_spl_save(void)340 int mrccache_spl_save(void)
341 {
342 	int i;
343 
344 	for (i = 0; i < MRC_TYPE_COUNT; i++) {
345 		struct mrc_output *mrc = &gd->arch.mrc[i];
346 		void *data;
347 		int size;
348 
349 		size = mrc->len + MRC_DATA_HEADER_SIZE;
350 		data = malloc(size);
351 		if (!data)
352 			return log_msg_ret("Allocate MRC cache block", -ENOMEM);
353 		mrccache_setup(mrc, data);
354 	}
355 
356 	return mrccache_save();
357 }
358