1 /*
2  * Copyright (C) 2021 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #include <platform_def.h>
9 
10 #include <common/bl_common.h>
11 #include <common/debug.h>
12 #include <lib/mmio.h>
13 
14 #include <armada_common.h>
15 
16 #include "mss_defs.h"
17 
mss_start_cp_cm3(int cp)18 void mss_start_cp_cm3(int cp)
19 {
20 	uint32_t magic;
21 	uintptr_t sram = MVEBU_CP_REGS_BASE(cp) + MSS_CP_SRAM_OFFSET;
22 	uintptr_t regs = MVEBU_CP_REGS_BASE(cp) + MSS_CP_REGS_OFFSET;
23 
24 	magic = mmio_read_32(sram);
25 
26 	/* Make sure the FW was loaded */
27 	if (magic != MSS_FW_READY_MAGIC) {
28 		return;
29 	}
30 
31 	NOTICE("Starting CP%d MSS CPU\n", cp);
32 	/* remove the magic */
33 	mmio_write_32(sram, 0);
34 	/* Release M3 from reset */
35 	mmio_write_32(MSS_M3_RSTCR(regs),
36 		      (MSS_M3_RSTCR_RST_OFF << MSS_M3_RSTCR_RST_OFFSET));
37 }
38