1 /*
2  * Copyright 2021 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #include <drivers/arm/gicv3.h>
9 #include <plat_gic.h>
10 #include <plat/common/platform.h>
11 
12 /*
13  * NXP common helper to initialize the GICv3 only driver.
14  */
plat_ls_gic_driver_init(uintptr_t nxp_gicd_addr,uintptr_t nxp_gicr_addr,uint8_t plat_core_count,interrupt_prop_t * ls_interrupt_props,uint8_t ls_interrupt_prop_count,uintptr_t * target_mask_array,mpidr_hash_fn mpidr_to_core_pos)15 void plat_ls_gic_driver_init(uintptr_t nxp_gicd_addr,
16 			     uintptr_t nxp_gicr_addr,
17 			     uint8_t plat_core_count,
18 			     interrupt_prop_t *ls_interrupt_props,
19 			     uint8_t ls_interrupt_prop_count,
20 			     uintptr_t *target_mask_array,
21 			     mpidr_hash_fn mpidr_to_core_pos)
22 {
23 	static struct gicv3_driver_data ls_gic_data;
24 
25 	ls_gic_data.gicd_base = nxp_gicd_addr;
26 	ls_gic_data.gicr_base = nxp_gicr_addr;
27 	ls_gic_data.interrupt_props = ls_interrupt_props;
28 	ls_gic_data.interrupt_props_num = ls_interrupt_prop_count;
29 	ls_gic_data.rdistif_num = plat_core_count;
30 	ls_gic_data.rdistif_base_addrs = target_mask_array;
31 	ls_gic_data.mpidr_to_core_pos = mpidr_to_core_pos;
32 
33 	gicv3_driver_init(&ls_gic_data);
34 }
35 
plat_ls_gic_init(void)36 void plat_ls_gic_init(void)
37 {
38 	gicv3_distif_init();
39 	gicv3_rdistif_init(plat_my_core_pos());
40 	gicv3_cpuif_enable(plat_my_core_pos());
41 }
42 
43 /*
44  * NXP common helper to enable the GICv3 CPU interface
45  */
plat_ls_gic_cpuif_enable(void)46 void plat_ls_gic_cpuif_enable(void)
47 {
48 	gicv3_cpuif_enable(plat_my_core_pos());
49 }
50 
51 /*
52  * NXP common helper to disable the GICv3 CPU interface
53  */
plat_ls_gic_cpuif_disable(void)54 void plat_ls_gic_cpuif_disable(void)
55 {
56 	gicv3_cpuif_disable(plat_my_core_pos());
57 }
58 
59 /*
60  * NXP common helper to initialize the per cpu distributor interface in GICv3
61  */
plat_gic_pcpu_init(void)62 void plat_gic_pcpu_init(void)
63 {
64 	gicv3_rdistif_init(plat_my_core_pos());
65 	gicv3_cpuif_enable(plat_my_core_pos());
66 }
67 
68 /*
69  * Stubs for Redistributor power management. Although GICv3 doesn't have
70  * Redistributor interface, these are provided for the sake of uniform GIC API
71  */
plat_ls_gic_redistif_on(void)72 void plat_ls_gic_redistif_on(void)
73 {
74 }
75 
plat_ls_gic_redistif_off(void)76 void plat_ls_gic_redistif_off(void)
77 {
78 }
79