Home
last modified time | relevance | path

Searched defs:parents (Results 1 – 25 of 60) sorted by relevance

123

/linux/drivers/clk/st/
A Dclkgen-mux.c21 const char **parents; in clkgen_mux_get_parents() local
57 const char **parents; in st_of_clkgen_mux_setup() local
A Dclk-flexgen.c280 const char **parents; in flexgen_get_parents() local
646 const char **parents; in st_of_flexgen_setup() local
/linux/drivers/clk/imx/
A Dclk.h119 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
122 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
125 #define imx_clk_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
134 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
173 #define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \ argument
176 #define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \ argument
179 #define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
182 #define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \ argument
185 #define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
356 u8 shift, u8 width, const char * const *parents, in __imx_clk_hw_mux()
A Dclk-fixup-mux.c68 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_fixup_mux()
A Dclk-scu.h56 static inline struct clk_hw *imx_clk_scu2(const char *name, const char * const *parents, in imx_clk_scu2()
A Dclk-scu.c32 const char * const *parents; member
451 const char * const *parents, int num_parents, in __imx_clk_scu()
657 const char * const *parents, in imx_clk_scu_alloc_dev()
/linux/drivers/clk/zynqmp/
A Dclkc.c98 u32 parents[CLK_GET_PARENTS_RESP_WORDS]; member
306 const char * const *parents, in zynqmp_clk_register_fixed_factor()
471 static int __zynqmp_clock_get_parents(struct clock_parent *parents, in __zynqmp_clock_get_parents()
507 static int zynqmp_clock_get_parents(u32 clk_id, struct clock_parent *parents, in zynqmp_clock_get_parents()
546 struct clock_parent *parents; in zynqmp_get_parent_list() local
A Dclk-mux-zynqmp.c132 const char * const *parents, in zynqmp_clk_register_mux()
A Dclk-gate-zynqmp.c108 const char * const *parents, in zynqmp_clk_register_gate()
/linux/drivers/clk/sunxi/
A Dclk-sun4i-display.c19 u8 parents; member
104 const char *parents[4]; in sun4i_a10_display_init() local
A Dclk-a20-gmac.c58 const char *parents[SUN7I_A20_GMAC_PARENTS]; in sun7i_a20_gmac_clk_setup() local
A Dclk-a10-mod1.c26 const char *parents[4]; in sun4i_mod1_clk_setup() local
A Dclk-sun8i-mbus.c27 const char **parents; in sun8i_a23_mbus_setup() local
A Dclk-sun8i-bus-gates.c24 const char *parents[PARENT_MAX]; in sun8i_h3_bus_gates_init() local
/linux/drivers/clk/pxa/
A Dclk-pxa25x.c136 #define PXA25X_CKEN(dev_id, con_id, parents, mult, div, \ argument
150 #define PXA25X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
153 #define PXA25X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
A Dclk-pxa.h119 #define PXA_CKEN(_dev_id, _con_id, _name, parents, _mult_lp, _div_lp, \ argument
129 #define PXA_CKEN_1RATE(dev_id, con_id, name, parents, cken_reg, \ argument
A Dclk-pxa27x.c132 #define PXA27X_CKEN(dev_id, con_id, parents, mult_hp, div_hp, \ argument
146 #define PXA27X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
149 #define PXA27X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
A Dclk-pxa3xx.c127 #define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \ argument
136 #define PXA3XX_CKEN_1RATE(dev_id, con_id, bit, parents) \ argument
/linux/drivers/clk/nxp/
A Dclk-lpc18xx-cgu.c539 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_div() local
559 const char *parents[CLK_SRC_MAX]; in lpc18xx_register_base_clk() local
586 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_pll() local
603 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_source_clks() local
/linux/drivers/clk/tegra/
A Dclk-bpmp.c23 unsigned int parents[MRQ_CLK_MAX_PARENTS]; member
35 unsigned int *parents; member
472 const char **parents; in tegra_bpmp_clk_register() local
/linux/drivers/mmc/host/
A Dmeson-mx-sdhc-clkc.c51 const struct clk_parent_data *parents, in meson_mx_sdhc_clk_hw_register()
/linux/drivers/clk/zynq/
A Dclkc.c104 const char **parents, int enable) in zynq_clk_register_fclk()
176 const char **parents, unsigned int two_gates) in zynq_clk_register_periph_clk()
/linux/drivers/gpu/drm/sun4i/
A Dsun8i_hdmi_phy_clk.c148 const char *parents[2]; in sun8i_phy_clk_create() local
A Dsun4i_hdmi_tmds_clk.c207 const char *parents[2]; in sun4i_tmds_create() local
/linux/drivers/clk/samsung/
A Dclk-exynos-clkout.c106 struct clk *parents[EXYNOS_CLKOUT_PARENTS]; in exynos_clkout_probe() local

Completed in 43 milliseconds

123