| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hwseq.c | 99 struct pipe_ctx *pipe_ctx, in dcn20_setup_gsl_group_as_lock()
179 struct pipe_ctx *pipe_ctx, in dcn20_set_flip_control_gsl()
266 struct pipe_ctx *pipe_ctx, in dcn20_program_triple_buffer()
642 struct pipe_ctx *pipe_ctx, in dcn20_enable_stream_timing()
769 struct pipe_ctx *pipe_ctx, in dcn20_program_output_csc()
993 struct pipe_ctx *pipe_ctx, in dcn20_blank_pixel_data()
1063 struct pipe_ctx *pipe_ctx) in dcn20_power_on_plane()
1085 struct pipe_ctx *pipe_ctx, in dcn20_enable_plane()
1404 struct pipe_ctx *pipe_ctx, in dcn20_update_dchubp_dpp()
1572 struct pipe_ctx *pipe_ctx, in dcn20_program_pipe()
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| A D | dcn20_resource.c | 1594 struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters()
1654 static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in build_pipe_hw_param()
1676 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); in dcn20_build_mapped_resource() local
1748 struct pipe_ctx *pipe_ctx = &dc_ctx->res_ctx.pipe_ctx[i]; in dcn20_add_dsc_to_stream_resource() local
1774 struct pipe_ctx *pipe_ctx = NULL; in remove_dsc_from_stream_resource() local
2476 struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[i]; in dcn20_validate_dsc() local
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_hw_sequencer.c | 55 struct pipe_ctx *pipe_ctx = NULL; in dce60_should_enable_fbc() local
124 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; in dce60_enable_fbc() local
143 static void dce60_set_default_colors(struct pipe_ctx *pipe_ctx) in dce60_set_default_colors()
182 struct pipe_ctx *pipe_ctx) in dce60_program_surface_visibility()
197 static void dce60_get_surface_visual_confirm_color(const struct pipe_ctx *pipe_ctx, in dce60_get_surface_visual_confirm_color()
233 const struct pipe_ctx *pipe_ctx) in dce60_program_scaler()
271 struct dc *dc, struct pipe_ctx *pipe_ctx) in dce60_program_front_end_for_pipe()
396 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dce60_apply_ctx_for_surface() local
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_hw_sequencer.c | 1338 const struct pipe_ctx *pipe_ctx,
1419 const struct pipe_ctx *pipe_ctx)
1460 struct pipe_ctx *pipe_ctx,
1515 struct pipe_ctx *pipe_ctx,
1973 static void set_drr(struct pipe_ctx **pipe_ctx,
2049 struct pipe_ctx *pipe_ctx = NULL; local
2428 struct pipe_ctx *pipe_ctx)
2474 struct pipe_ctx *pipe_ctx)
2744 struct dc *dc, struct pipe_ctx *pipe_ctx)
2920 struct pipe_ctx *pipe_ctx)
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| A D | dce110_resource.c | 883 const struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters()
917 void dce110_resource_build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in dce110_resource_build_pipe_hw_param()
929 static bool is_surface_pixel_format_supported(struct pipe_ctx *pipe_ctx, unsigned int underlay_idx) in is_surface_pixel_format_supported()
945 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); in build_mapped_resource() local
1130 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[underlay_idx]; in dce110_acquire_underlay() local
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer.c | 97 struct pipe_ctx *pipe_ctx; in dcn10_lock_all_pipes() local
873 struct pipe_ctx *pipe_ctx, in dcn10_enable_stream_timing()
967 struct pipe_ctx *pipe_ctx, in dcn10_reset_back_end_for_pipe()
1045 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local
1070 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local
1083 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local
1093 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local
1105 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local
2360 struct pipe_ctx *pipe_ctx, in dcn10_enable_plane()
2452 struct pipe_ctx *pipe_ctx, in dcn10_program_output_csc()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_hwseq.c | 57 struct pipe_ctx *pipe_ctx, PHYSICAL_ADDRESS_LOC *addr) in patch_address_for_sbs_tb_stereo()
131 void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn201_update_plane_addr()
316 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn201_init_hw() local
351 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn201_init_hw() local
389 void dcn201_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn201_plane_atomic_disconnect()
435 void dcn201_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn201_update_mpcc()
571 void dcn201_set_cursor_attribute(struct pipe_ctx *pipe_ctx) in dcn201_set_cursor_attribute()
583 void dcn201_set_dmdata_attributes(struct pipe_ctx *pipe_ctx) in dcn201_set_dmdata_attributes()
606 void dcn201_unblank_stream(struct pipe_ctx *pipe_ctx, in dcn201_unblank_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 358 struct pipe_ctx { struct
371 struct pipe_ctx *top_pipe; argument
372 struct pipe_ctx *bottom_pipe; argument
373 struct pipe_ctx *next_odm_pipe; argument
374 struct pipe_ctx *prev_odm_pipe; argument
377 struct _vcs_dpi_display_dlg_regs_st dlg_regs;
378 struct _vcs_dpi_display_ttu_regs_st ttu_regs;
379 struct _vcs_dpi_display_rq_regs_st rq_regs;
380 struct _vcs_dpi_display_pipe_dest_params_st pipe_dlg_param;
381 struct _vcs_dpi_display_rq_params_st dml_rq_param;
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| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| A D | dc_common.c | 52 bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_lower_pipe_tree_visible()
61 bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_upper_pipe_tree_visible()
70 bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_pipe_tree_visible()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_hwseq.c | 72 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn30_set_blend_lut()
93 struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream) in dcn30_set_mpc_shaper_3dlut()
145 struct pipe_ctx *pipe_ctx, in dcn30_set_input_transfer_func()
188 struct pipe_ctx *pipe_ctx, in dcn30_set_output_transfer_func()
399 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i_pipe]; in dcn30_program_all_writeback_pipes_in_tree() local
670 void dcn30_set_avmute(struct pipe_ctx *pipe_ctx, bool enable) in dcn30_set_avmute()
681 void dcn30_update_info_frame(struct pipe_ctx *pipe_ctx) in dcn30_update_info_frame()
707 void dcn30_program_dmdata_engine(struct pipe_ctx *pipe_ctx) in dcn30_program_dmdata_engine()
973 struct pipe_ctx *pipe_ctx, in dcn30_set_disp_pattern_generator()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_link.c | 1866 struct pipe_ctx *pipe_ctx) in enable_link_dp()
1983 struct pipe_ctx *pipe_ctx) in enable_link_edp()
1994 struct pipe_ctx *pipe_ctx) in enable_link_dp_mst()
2115 static bool i2c_write(struct pipe_ctx *pipe_ctx, in i2c_write()
2142 struct pipe_ctx *pipe_ctx, in write_i2c_retimer_setting()
2304 struct pipe_ctx *pipe_ctx, in write_i2c_default_retimer_setting()
2427 struct pipe_ctx *pipe_ctx, in write_i2c_redriver_setting()
2504 static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) in enable_link_hdmi()
2585 struct pipe_ctx *pipe_ctx) in enable_link()
2901 struct pipe_ctx *pipe_ctx = NULL; in get_pipe_from_link() local
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| A D | dc_resource.c | 602 struct pipe_ctx *pipe_ctx) in resource_find_used_clk_src_for_sharing()
752 static void calculate_viewport_size(struct pipe_ctx *pipe_ctx) in calculate_viewport_size()
767 static void calculate_recout(struct pipe_ctx *pipe_ctx) in calculate_recout()
1054 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) in resource_build_scaling_params()
1490 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dc_remove_plane_from_context() local
1752 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in acquire_first_free_pipe() local
2040 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst]; in acquire_resource_from_hw_enabled_state() local
2101 struct pipe_ctx *pipe_ctx = NULL; in resource_map_pool_resources() local
2344 struct pipe_ctx *pipe_ctx) in set_avi_info_frame()
2726 void resource_build_info_frame(struct pipe_ctx *pipe_ctx) in resource_build_info_frame()
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| A D | dc_link_hwss.c | 520 bool dp_set_dsc_on_rx(struct pipe_ctx *pipe_ctx, bool enable) in dp_set_dsc_on_rx()
536 void dp_set_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable)
633 bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable)
666 bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool enable, bool immediate_update)
729 bool dp_update_dsc_config(struct pipe_ctx *pipe_ctx)
843 void setup_dp_hpo_stream(struct pipe_ctx *pipe_ctx, bool enable)
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| A D | dc_hw_sequencer.c | 296 struct pipe_ctx *pipe_ctx, in get_mpctree_visual_confirm_color()
317 const struct pipe_ctx *pipe_ctx, in get_surface_visual_confirm_color()
367 struct pipe_ctx *pipe_ctx, in get_hdr_visual_confirm_color()
408 struct pipe_ctx *pipe_ctx, in get_surface_tile_visual_confirm_color()
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| A D | dc_stream.c | 268 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_attributes() local
368 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_position() local
595 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in dc_stream_send_dp_sdp() local
668 struct pipe_ctx *pipe_ctx = NULL; in dc_stream_set_dynamic_metadata() local
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| A D | dc_debug.c | 319 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local
331 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local
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| A D | dc.c | 690 struct pipe_ctx *pipe_ctx; in dc_stream_set_dyn_expansion() local
1060 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in apply_ctx_interdependent_lock() local
1605 struct pipe_ctx *pipe_ctx, in should_update_pipe_for_stream()
1613 struct pipe_ctx *pipe_ctx, in should_update_pipe_for_plane()
2697 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_do_stream_update() local
2851 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_for_stream() local
2926 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_for_stream() local
2948 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_for_stream() local
3081 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_for_stream() local
3156 struct pipe_ctx *pipe_ctx = in dc_commit_updates_for_stream() local
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| A D | dc_surface.c | 151 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
163 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
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| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_hwseq.c | 129 void dcn21_PLAT_58856_wa(struct dc_state *context, struct pipe_ctx *pipe_ctx) in dcn21_PLAT_58856_wa()
162 void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx) in dcn21_set_abm_immediate_disable()
182 void dcn21_set_pipe(struct pipe_ctx *pipe_ctx) in dcn21_set_pipe()
198 bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx, in dcn21_set_backlight_level()
238 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn21_is_abm_supported() local
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_hwseq.c | 397 void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx) in dcn31_update_info_frame()
516 struct pipe_ctx *pipe_ctx, in dcn31_reset_back_end_for_pipe()
591 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn31_reset_hw_ctx_wrap() local
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_debugfs.c | 1302 struct pipe_ctx *pipe_ctx; in dp_dsc_clock_en_read() local
1383 struct pipe_ctx *pipe_ctx; in dp_dsc_clock_en_write() local
1489 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_width_read() local
1564 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_width_write() local
1674 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_height_read() local
1753 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_height_write() local
1855 struct pipe_ctx *pipe_ctx; in dp_dsc_bits_per_pixel_read() local
1931 struct pipe_ctx *pipe_ctx; in dp_dsc_bits_per_pixel_write() local
2031 struct pipe_ctx *pipe_ctx; in dp_dsc_pic_width_read() local
2088 struct pipe_ctx *pipe_ctx; in dp_dsc_pic_height_read() local
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_trace.h | 26 #define TRACE_DC_PIPE_STATE(pipe_ctx, index, max_pipes) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| A D | dcn20_clk_mgr.c | 146 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist() local
177 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| A D | rv1_clk_mgr.c | 167 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in ramp_up_dispclk_with_dpp() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| A D | dce110_clk_mgr.c | 132 const struct pipe_ctx *pipe_ctx = NULL; in dce110_fill_display_configs() local
|