1 #ifndef __XEN_IRQ_H__ 2 #define __XEN_IRQ_H__ 3 4 #include <xen/cpumask.h> 5 #include <xen/rcupdate.h> 6 #include <xen/spinlock.h> 7 #include <xen/time.h> 8 #include <xen/list.h> 9 #include <asm/regs.h> 10 #include <asm/hardirq.h> 11 #include <public/event_channel.h> 12 13 struct irqaction { 14 void (*handler)(int, void *, struct cpu_user_regs *); 15 const char *name; 16 void *dev_id; 17 bool_t free_on_release; 18 #ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION 19 struct irqaction *next; 20 #endif 21 }; 22 23 /* 24 * IRQ line status. 25 */ 26 #define _IRQ_INPROGRESS 0 /* IRQ handler active - do not enter! */ 27 #define _IRQ_DISABLED 1 /* IRQ disabled - do not enter! */ 28 #define _IRQ_PENDING 2 /* IRQ pending - replay on enable */ 29 #define _IRQ_REPLAY 3 /* IRQ has been replayed but not acked yet */ 30 #define _IRQ_GUEST 4 /* IRQ is handled by guest OS(es) */ 31 #define _IRQ_MOVE_PENDING 5 /* IRQ is migrating to another CPUs */ 32 #define _IRQ_PER_CPU 6 /* IRQ is per CPU */ 33 #define _IRQ_GUEST_EOI_PENDING 7 /* IRQ was disabled, pending a guest EOI */ 34 #define _IRQF_SHARED 8 /* IRQ is shared */ 35 #define IRQ_INPROGRESS (1u<<_IRQ_INPROGRESS) 36 #define IRQ_DISABLED (1u<<_IRQ_DISABLED) 37 #define IRQ_PENDING (1u<<_IRQ_PENDING) 38 #define IRQ_REPLAY (1u<<_IRQ_REPLAY) 39 #define IRQ_GUEST (1u<<_IRQ_GUEST) 40 #define IRQ_MOVE_PENDING (1u<<_IRQ_MOVE_PENDING) 41 #define IRQ_PER_CPU (1u<<_IRQ_PER_CPU) 42 #define IRQ_GUEST_EOI_PENDING (1u<<_IRQ_GUEST_EOI_PENDING) 43 #define IRQF_SHARED (1u<<_IRQF_SHARED) 44 45 /* Special IRQ numbers. */ 46 #define AUTO_ASSIGN_IRQ (-1) 47 #define NEVER_ASSIGN_IRQ (-2) 48 #define FREE_TO_ASSIGN_IRQ (-3) 49 50 struct irq_desc; 51 52 /* 53 * Interrupt controller descriptor. This is all we need 54 * to describe about the low-level hardware. 55 */ 56 struct hw_interrupt_type { 57 const char *typename; 58 unsigned int (*startup)(struct irq_desc *); 59 void (*shutdown)(struct irq_desc *); 60 void (*enable)(struct irq_desc *); 61 void (*disable)(struct irq_desc *); 62 void (*ack)(struct irq_desc *); 63 #ifdef CONFIG_X86 64 void (*end)(struct irq_desc *, u8 vector); 65 #else 66 void (*end)(struct irq_desc *); 67 #endif 68 void (*set_affinity)(struct irq_desc *, const cpumask_t *); 69 }; 70 71 typedef const struct hw_interrupt_type hw_irq_controller; 72 73 #include <asm/irq.h> 74 75 struct msi_desc; 76 /* 77 * This is the "IRQ descriptor", which contains various information 78 * about the irq, including what kind of hardware handling it has, 79 * whether it is disabled etc etc. 80 * 81 * Note: on ARMv8 we can use normal bit manipulation functions to access 82 * the status field because struct irq_desc contains pointers, therefore 83 * the alignment of the struct is at least 8 bytes and status is the 84 * first field. 85 */ 86 typedef struct irq_desc { 87 unsigned int status; /* IRQ status */ 88 hw_irq_controller *handler; 89 struct msi_desc *msi_desc; 90 struct irqaction *action; /* IRQ action list */ 91 int irq; 92 spinlock_t lock; 93 struct arch_irq_desc arch; 94 cpumask_var_t affinity; 95 96 /* irq ratelimit */ 97 s_time_t rl_quantum_start; 98 unsigned int rl_cnt; 99 struct list_head rl_link; 100 } __cacheline_aligned irq_desc_t; 101 102 #ifndef irq_to_desc 103 #define irq_to_desc(irq) (&irq_desc[irq]) 104 #endif 105 106 int init_one_irq_desc(struct irq_desc *); 107 int arch_init_one_irq_desc(struct irq_desc *); 108 109 #define irq_desc_initialized(desc) ((desc)->handler != NULL) 110 111 extern int setup_irq(unsigned int irq, unsigned int irqflags, 112 struct irqaction *); 113 extern void release_irq(unsigned int irq, const void *dev_id); 114 extern int request_irq(unsigned int irq, unsigned int irqflags, 115 void (*handler)(int, void *, struct cpu_user_regs *), 116 const char * devname, void *dev_id); 117 118 extern hw_irq_controller no_irq_type; 119 extern void no_action(int cpl, void *dev_id, struct cpu_user_regs *regs); 120 extern unsigned int irq_startup_none(struct irq_desc *); 121 extern void irq_actor_none(struct irq_desc *); 122 #define irq_shutdown_none irq_actor_none 123 #define irq_disable_none irq_actor_none 124 #define irq_enable_none irq_actor_none 125 126 struct domain; 127 struct vcpu; 128 129 struct pirq { 130 int pirq; 131 evtchn_port_t evtchn; 132 struct rcu_head rcu_head; 133 bool masked; 134 /* Architectures may require this field to be last. */ 135 struct arch_pirq arch; 136 }; 137 138 #define INVALID_PIRQ (-1) 139 #define pirq_info(d, p) ((struct pirq *)radix_tree_lookup(&(d)->pirq_tree, p)) 140 141 /* Use this instead of pirq_info() if the structure may need allocating. */ 142 extern struct pirq *pirq_get_info(struct domain *, int pirq); 143 144 #define pirq_field(d, p, f, def) ({ \ 145 const struct pirq *__pi = pirq_info(d, p); \ 146 __pi ? __pi->f : def; \ 147 }) 148 #define pirq_to_evtchn(d, pirq) pirq_field(d, pirq, evtchn, 0) 149 #define pirq_masked(d, pirq) pirq_field(d, pirq, masked, 0) 150 151 void pirq_cleanup_check(struct pirq *, struct domain *); 152 153 #define pirq_cleanup_check(pirq, d) \ 154 ((pirq)->evtchn ? pirq_cleanup_check(pirq, d) : (void)0) 155 156 extern void pirq_guest_eoi(struct pirq *); 157 extern void desc_guest_eoi(struct irq_desc *, struct pirq *); 158 extern int pirq_guest_unmask(struct domain *d); 159 extern int pirq_guest_bind(struct vcpu *, struct pirq *, int will_share); 160 extern void pirq_guest_unbind(struct domain *d, struct pirq *); 161 extern void pirq_set_affinity(struct domain *d, int irq, const cpumask_t *); 162 extern irq_desc_t *domain_spin_lock_irq_desc( 163 struct domain *d, int irq, unsigned long *pflags); 164 extern irq_desc_t *pirq_spin_lock_irq_desc( 165 const struct pirq *, unsigned long *pflags); 166 167 unsigned int set_desc_affinity(struct irq_desc *, const cpumask_t *); 168 169 #ifndef arch_hwdom_irqs 170 unsigned int arch_hwdom_irqs(domid_t); 171 #endif 172 173 #ifndef arch_evtchn_bind_pirq 174 void arch_evtchn_bind_pirq(struct domain *, int pirq); 175 #endif 176 177 #endif /* __XEN_IRQ_H__ */ 178